| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 09/28/1999 | US5959898 Dynamic cell plate sensing and equilibration in a memory device |
| 09/28/1999 | US5959887 Electrically erasable programmable nonvolatile semiconductor memory having dual operation function |
| 09/28/1999 | US5959876 Single or dual message multilevel analog signal recording and playback system containing independently controlled signal storage segments with externally selectable duration capability |
| 09/28/1999 | US5959474 Output buffer for memory circuit |
| 09/28/1999 | US5959467 High speed dynamic differential logic circuit employing capacitance matching devices |
| 09/28/1999 | US5959445 Static, high-sensitivity, fuse-based storage cell |
| 09/28/1999 | US5959276 Issuing customized IC cards of different types |
| 09/23/1999 | WO1999048203A1 Method and apparatus for glitch protection for input buffers in a source-synchronous environment |
| 09/23/1999 | DE19900365A1 Semiconductor memory e.g. DRAM |
| 09/23/1999 | DE19833570A1 Multi-port semiconductor memory with grouped bitlines |
| 09/22/1999 | EP0944090A2 Semiconductor memory device |
| 09/22/1999 | EP0944089A1 Semiconductor memory device |
| 09/22/1999 | EP0943177A1 Clock vernier adjustment |
| 09/22/1999 | EP0820631B1 Circuit for sram test mode isolated bitline modulation |
| 09/22/1999 | CN1229252A Semiconductor integrated circuit device having clamp circuit |
| 09/22/1999 | CN1229251A Semiconductor memory device having dynamic data amplifier capable of reducing power dissipation |
| 09/21/1999 | US5956290 DLL circuit and a memory device building the same in |
| 09/21/1999 | US5956289 Clock signal from an adjustable oscillator for an integrated circuit |
| 09/21/1999 | US5956287 Semiconductor memory |
| 09/21/1999 | US5956285 Synchronous semiconductor memory device with multi-bank configuration |
| 09/21/1999 | US5956284 Method and apparatus for writing to memory components |
| 09/21/1999 | US5956283 Method of reading a flash memory cell and a read voltage generating circuit |
| 09/21/1999 | US5956282 Antifuse detect circuit |
| 09/21/1999 | US5956274 Memory device with multiple processors having parallel access to the same memory area |
| 09/21/1999 | US5956266 Reference cell for a 1T/1C ferroelectric memory |
| 09/21/1999 | US5955905 Signal generator with synchronous mirror delay circuit |
| 09/21/1999 | US5955904 Semiconductor integrated circuit with appropriate data output timing and reduced power consumption |
| 09/21/1999 | US5954804 Synchronous memory device having an internal register |
| 09/21/1999 | US5954772 Apparatus for detecting abnormalitey of clock in microcomputer used for motor vehicle |
| 09/16/1999 | WO1999046776A1 Semiconductor storage device |
| 09/16/1999 | WO1999046774A1 System and method for pld bitstream encryption |
| 09/16/1999 | WO1999046687A1 Data transmitter |
| 09/16/1999 | DE19904388A1 Semiconductor memory for storing data |
| 09/16/1999 | DE19810114A1 Search process for musical pieces, for radio receiver |
| 09/15/1999 | EP0942429A2 Column address generator circuit |
| 09/15/1999 | CN1228598A Memory readout circuit and static random access memory |
| 09/14/1999 | US5953739 Synchronous DRAM cache using write signal to determine single or burst write |
| 09/14/1999 | US5953738 DRAM with integral SRAM and arithmetic-logic units |
| 09/14/1999 | US5953286 Semiconductor memory |
| 09/14/1999 | US5953285 Scan path circuitry including an output register having a flow through mode |
| 09/14/1999 | US5953284 Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same |
| 09/14/1999 | US5953282 Circuit for generating switching control signal |
| 09/14/1999 | US5953281 Semiconductor memory device having switch to selectively connect output terminal to bit lines |
| 09/14/1999 | US5953280 Bank selection for synchronous readable and writable semiconductor memory |
| 09/14/1999 | US5953278 Data sequencing and registering in a four bit pre-fetch SDRAM |
| 09/14/1999 | US5953277 Reference potential generator and a semiconductor memory device having the same |
| 09/14/1999 | US5953276 Fully-differential amplifier |
| 09/14/1999 | US5953275 Semiconductor memory device having sense amplifiers shared between open bit line less affected by adjacent ones |
| 09/14/1999 | US5953271 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing |
| 09/14/1999 | US5953270 Column redundancy circuit for a memory device |
| 09/14/1999 | US5953266 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 09/14/1999 | US5953263 Synchronous memory device having a programmable register and method of controlling same |
| 09/14/1999 | US5953262 Output circuit of a semiconductor memory device for providing an intermediate potential to an output terminal |
| 09/14/1999 | US5953261 Semiconductor memory device having data input/output circuit of small occupied area capable of high-speed data input/output |
| 09/14/1999 | US5953257 Semiconductor memory device accessible at high speed |
| 09/14/1999 | US5953244 Semiconductor memory device capable of page mode or serial access mode |
| 09/14/1999 | US5953242 System with meshed power and signal buses on cell array |
| 09/14/1999 | US5952868 Voltage level interface circuit with set-up and hold control |
| 09/10/1999 | WO1999045543A1 Ram with multiple image reflections |
| 09/10/1999 | WO1999045461A2 Improved compact flash memory card and interface |
| 09/10/1999 | WO1999045460A2 Flash memory card with enhanced operating mode detection and user-friendly interfacing system |
| 09/08/1999 | EP0940851A1 Integrated circuit security system and method with implanted interconnections |
| 09/08/1999 | EP0940817A2 Improved dynamic access memory delay circuits and methods therefor |
| 09/08/1999 | EP0940767A1 Ic memory card |
| 09/08/1999 | CN1228170A Optical logic element and optical logic device |
| 09/08/1999 | CN1227954A Write driver and bit line precharging apparatus and method |
| 09/08/1999 | CN1227953A Storage controller, storage controlling method and stored program media |
| 09/07/1999 | US5950223 Dual-edge extended data out memory |
| 09/07/1999 | US5950219 Memory banks with pipelined addressing and priority acknowledging and systems and methods using the same |
| 09/07/1999 | US5949737 Address processing circuit |
| 09/07/1999 | US5949732 Method of structuring a multi-bank DRAM into a hierarchical column select line architecture |
| 09/07/1999 | US5949730 Method and apparatus for quickly restoring digit I/O lines |
| 09/07/1999 | US5949729 Semiconductor memory device |
| 09/07/1999 | US5949728 High speed, noise immune, single ended sensing scheme for non-volatile memories |
| 09/07/1999 | US5949727 Semiconductor memory device with data sensing scheme regardless of bit line coupling |
| 09/07/1999 | US5949723 Fast single ended sensing with configurable half-latch |
| 09/07/1999 | US5949722 I/O bias circuit insensitive to inadvertent power supply variations for MOS memory |
| 09/07/1999 | US5949721 Data output related circuit which is suitable for semiconductor memory device for high -speed operation |
| 09/07/1999 | US5949720 Integrated circuit chip |
| 09/07/1999 | US5949719 Field programmable memory array |
| 09/07/1999 | US5949706 Static random access memory cell having a thin film transistor (TFT) pass gate connection to a bit line |
| 09/07/1999 | US5949698 Semiconductor memory device |
| 09/07/1999 | US5949697 Semiconductor memory device having hierarchical input/output line structure and method for arranging the same |
| 09/07/1999 | US5949260 Clock signal processing circuit and semiconductor device in which a clock signal is processed in improved method |
| 09/07/1999 | US5949256 Asymmetric sense amplifier for single-ended memory arrays |
| 09/07/1999 | US5949252 Bus configuration and input/output buffer |
| 09/02/1999 | WO1999019875A3 Apparatus and method for pipelined memory operations |
| 09/02/1999 | DE19808347A1 Integrated memory |
| 09/01/1999 | EP0939408A1 Operating voltage selection circuit for non-volatile semiconductor memories |
| 09/01/1999 | EP0850479B1 Interlaced layout configuration for differential pairs of interconnect lines |
| 09/01/1999 | CN1227388A Semiconductor memory device |
| 08/31/1999 | US5946712 Apparatus and method for reading data from synchronous memory |
| 08/31/1999 | US5946269 Synchronous RAM controlling device and method |
| 08/31/1999 | US5946268 Internal clock signal generation circuit including delay line, and synchronous type semiconductor memory device including internal clock signal |
| 08/31/1999 | US5946267 Zero power high speed configuration memory |
| 08/31/1999 | US5946266 Synchronous semiconductor memory device capable of reducing delay time at data input/output line upon data input |
| 08/31/1999 | US5946265 Continuous burst EDO memory device |
| 08/31/1999 | US5946264 Method and structure for enhancing the access time of integrated circuit memory devices |
| 08/31/1999 | US5946262 RAM having multiple ports sharing common memory locations |
| 08/31/1999 | US5946261 Dual-port memory |