Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
02/2000
02/01/2000US6021478 Method for operating a microprocessor and a burst memory using a chip enable and an output enable signal
02/01/2000US6021460 Protect circuit of register
02/01/2000US6021085 Read only semiconductor memory device
02/01/2000US6021084 Multi-bit block write in a random access memory
02/01/2000US6021082 Semiconductor memory device including an internal power supply circuit having standby and activation mode
02/01/2000US6021081 Semiconductor memory device having strobe buffer and output buffer
02/01/2000US6021077 Semiconductor memory device controlled in synchronous with external clock
02/01/2000US6021076 Apparatus and method for thermal regulation in memory subsystems
02/01/2000US6021074 Direct access to random redundant logic gates by using multiple short addresses
02/01/2000US6021072 Method and apparatus for precharging bitlines in a nonvolatile memory
02/01/2000US6021071 Semiconductor integrated circuit
02/01/2000US6021070 Circuit and method for reading and writing data in a memory device
02/01/2000US6021067 Circuit of sensing a fuse cell in a flash memory
02/01/2000US6021064 Layout for data storage circuit using shared bit line and method therefor
02/01/2000US6021062 Semiconductor memory device capable of reducing a load imposed upon a sense amplifier to shorten a sensing time
02/01/2000US6020775 Adjustable timer circuit
02/01/2000US6020761 Input buffers and controlling methods for integrated circuit memory devices that operate with low voltage transistor-transistor logic (LVTTL) and with stub series terminated transceiver logic (SSTL)
01/2000
01/27/2000WO2000004481A2 An apparatus and method for thermal regulation in memory subsystems
01/27/2000DE19929095A1 Semiconductor memory, e.g. SDRAM, with overcontrolled read-out amplifier
01/26/2000EP0974978A1 Semiconductor memory device capable of performing a write operation 1 or 2 cycles after receiving a write command without a dead cycle
01/26/2000EP0974976A1 Circuit and method for reading a non-volatile memory
01/26/2000CN1242578A Switchable multi bit semiconductor memory device
01/25/2000USRE36532 Synchronous semiconductor memory device having an auto-precharge function
01/25/2000US6018811 Layout for semiconductor memory device wherein intercoupling lines are shared by two sets of fuse banks and two sets of redundant elements not simultaneously active
01/25/2000US6018794 Data processing apparatus and method for generating timing signals for a self-timed circuit
01/25/2000US6018793 Single chip controller-memory device including feature-selectable bank I/O and architecture and methods suitable for implementing the same
01/25/2000US6018492 Semiconductor memory device
01/25/2000US6018491 Synchronous dynamic random access memory
01/25/2000US6018489 Mock wordline scheme for timing control
01/25/2000US6018488 Semiconductor memory device and method relieving defect of semiconductor memory device
01/25/2000US6018487 Read-only memory device having bit line discharge circuitry and method of reading data from the same
01/25/2000US6018486 Reading method and circuit for dynamic memory
01/25/2000US6018481 Dynamic semiconductor memory device
01/25/2000US6018480 Method and system which permits logic signal routing over on-chip memories
01/25/2000US6018478 Random access memory with separate row and column designation circuits for reading and writing
01/25/2000US6018354 Method for accessing banks of DRAM
01/25/2000US6018259 Phase locked delay circuit
01/25/2000US6018256 Output circuit and electronic apparatus using the same
01/25/2000US6018253 Register with current-steering input network
01/20/2000DE19926588A1 Low skew pulse generator for double data rate synchronous DRAM
01/20/2000DE19904542A1 Multi-bit dynamic random-access memory e.g. for personal computer is switched between binary memory mode and multi-value memory mode in response to mode selection signal fed to mode register
01/20/2000DE19819452C1 Verfahren und Vorrichtung zur elektroakustischen Übertragung von Schallenergie Method and apparatus for electro-acoustic transmission of sound energy
01/19/2000EP0973171A2 Analog signal recording and playback system with externally selectable duration capability
01/19/2000EP0973168A1 Non-volatile memory capable of autonomously executing a program
01/19/2000EP0973167A2 High-speed cycle clock-synchronous memory device
01/19/2000EP0972270A1 A storage apparatus and writing and/or reading methods for use in hierarchical coding
01/19/2000CN1241785A Semiconductor memory device and data read method thereof
01/19/2000CN1241783A Semiconductor memory device
01/19/2000CN1241753A Semiconductor integrated circuit and data processing system
01/18/2000US6016472 System and method for interfacing a digital audio processor to a low-speed serially addressable storage device
01/18/2000US6016403 State machine design for generating empty and full flags in an asynchronous FIFO
01/18/2000US6016390 Method and apparatus for eliminating bitline voltage offsets in memory devices
01/18/2000US6016283 Multiple data rate synchronous DRAM for enhancing data transfer speed
01/18/2000US6016282 Clock vernier adjustment
01/18/2000US6016280 Semiconductor integrated circuit device
01/18/2000US6016279 DRAM sensing scheme and isolation circuit
01/18/2000US6016264 Antifuse programming and detecting circuit
01/18/2000US6016070 Pulse extending circuit
01/18/2000US6016068 Power on reset circuit capable of generating power on reset signal without fail
01/18/2000US6016066 Method and apparatus for glitch protection for input buffers in a source-synchronous environment
01/18/2000US6016065 Charges recycling differential logic(CRDL) circuit and storage elements and devices using the same
01/13/2000WO2000002127A2 Data storage device
01/13/2000DE19929121A1 Buffer arrangement for improved loading of data onto a busline
01/12/2000EP0971361A1 High data rate write process for non-volatile flash memories
01/12/2000EP0965129A4 Recursive multi-channel interface
01/12/2000CN1241002A Interleaved sense amplifier with single-sided precharge device
01/12/2000CN1241001A Information processing apparatus and method, and distribution medium
01/11/2000US6014341 Synchronous-type semiconductor storage
01/11/2000US6014340 Synchronous semiconductor memory device having internal circuitry enabled only when commands are applied in normal sequence
01/11/2000US6014339 Synchronous DRAM whose power consumption is minimized
01/11/2000US6014338 Single ended read scheme with global bitline of multi-port register file
01/11/2000US6014337 Semiconductor storage device
01/11/2000US6014335 Semiconductor memory device
01/11/2000US6014334 Sample and load scheme for observability of internal nodes in a PLD
01/11/2000US6014333 Semiconductive memory device capable of carrying out a write-in operation at a high speed
01/11/2000US6014052 Implementation of serial fusible links
01/06/2000WO1999057936A3 Method and device for the electroacoustic transmission of acoustic energy
01/05/2000EP0969513A2 Embedded enhanced DRAM with integrated logic circuit, and associated method
01/05/2000EP0969480A1 Encoding method and memory device
01/05/2000EP0969479A1 High-bandwidth read and write architecture for non-volatile memories
01/05/2000EP0969476A1 Semiconductor integrated circuit memory
01/05/2000EP0969475A1 Dynamic semiconductor memory and method for the initialisation of a dynamic semiconductor memory
01/05/2000EP0969474A1 Dynamic semiconductor memory device and method for the initialisation of a dynamic semiconductor memory
01/05/2000EP0969473A1 An interleaved sense amplifier with a single-sided precharge device
01/05/2000EP0969402A2 Identification card processing system and method
01/05/2000EP0867026B1 Low voltage dynamic memory
01/05/2000DE19918932A1 Dynamic RAM (DRAM) type semiconductor memory with numerous memory cells
01/05/2000DE19829288A1 Dynamische Halbleiter-Speichervorrichtung und Verfahren zur Initialisierung einer dynamischen Halbleiter-Speichervorrichtung Dynamic semiconductor memory device and method of initializing a dynamic semiconductor memory device
01/05/2000DE19829287A1 Dynamische Halbleiter-Speichervorrichtung und Verfahren zur Initialisierung einer dynamischen Halbleiter-Speichervorrichtung Dynamic semiconductor memory device and method of initializing a dynamic semiconductor memory device
01/04/2000US6012122 Systems and methods for distinguishing between memory types
01/04/2000US6011751 Sychronous semiconductor memory device with burst address counter operating under linear/interleave mode of single data rate/double data rate scheme
01/04/2000US6011749 Integrated circuit having output timing control circuit and method thereof
01/04/2000US6011745 Semiconductor memory system with bank switching control
01/04/2000US6011744 Programmable logic device with multi-port memory
01/04/2000US6011743 Charge pump circuit for memory device
01/04/2000US6011742 Shared pull-up and selection circuitry for programmable cells such as antifuse cells
01/04/2000US6011741 Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems
01/04/2000US6011739 Semiconductor memory
01/04/2000US6011738 Sensing circuit with charge recycling
01/04/2000US6011737 DRAM with edge sense amplifiers which are activated along with sense amplifiers internal to the array during a read cycle