Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
12/2001
12/04/2001US6327200 Circuit and method for testing a memory device
12/04/2001US6327192 Method and circuit for providing a memory device having hidden row access and row precharge times
12/04/2001US6327190 Complementary differential input buffer for a semiconductor memory device
12/04/2001US6327188 Synchronous random access memory
12/04/2001US6327186 Non-volatile semiconductor memory including memory cells having different charge exchange capability
12/04/2001US6327185 Semiconductor memory apparatus which can make read speed of memory cell faster
12/04/2001US6327175 Method and apparatus for controlling a memory array with a programmable register
12/04/2001US6327169 Multiple bit line memory architecture
12/04/2001US6326837 Data processing circuit having a waiting mode
12/04/2001US6326815 Sense amplifier of semiconductor integrated circuit
12/04/2001US6326813 Method and apparatus for high-speed edge-programmable timing signal generation
12/04/2001US6326807 Programmable logic architecture incorporating a content addressable embedded array block
12/04/2001US6325291 Apparatus and method for transferring information between a smart diskette device and a computer
11/2001
11/29/2001WO2001091296A2 Block ram having multiple configurable write modes for use in a field programmable gate array
11/29/2001WO2001091131A1 Timing control means for automatic compensation of timing uncertainties
11/29/2001WO2001091130A1 Small-size rom
11/29/2001WO2001091129A1 Dynamic configuration of storage arrays
11/29/2001WO2001091128A2 Semiconductor memory and controlling method thereof
11/29/2001WO2001090864A2 Timing control means for automatic compensation of timing uncertainties
11/29/2001US20010047493 Power control system for synchronous memory device
11/29/2001US20010047464 Synchronous semiconductor memory device having a burst mode for improving efficiency of using the data bus
11/29/2001US20010047449 Semiconductor memory device and computer having a synchronization signal indicating that the memory data output is valid
11/29/2001US20010047437 FIFO type data input/output apparatus and FIFO type data input/output method
11/29/2001US20010046178 Semiconductor memory device having burst readout mode and data readout method
11/29/2001US20010046177 Semiconductor memory device
11/29/2001US20010046176 Semiconductor memory device having prefetch operation mode and data transfer method for reducing the number of main data lines
11/29/2001US20010046173 Semiconductor memory device
11/29/2001US20010046169 Voltage differential sensing circuit and methods of using same
11/29/2001US20010046163 Memory system and memory controller with reliable data latch operation
11/29/2001US20010046160 Memory device
11/29/2001US20010046150 Symmetric architecture for memory cells having widely spread metal bit lines
11/29/2001US20010045836 Impedance matching circuit for semiconductor memory device
11/29/2001US20010045581 Semiconductor device
11/29/2001US20010045579 Semiconductor device with reduced current consumption in standby state
11/29/2001US20010045574 Read amplifier circuit for high-speed reading and semiconductor memory device employing the read amplifier circuit
11/29/2001DE10110157A1 Halbleitervorrichtung mit verringertem Stromverbrauch im Standby-Zustand Semiconductor device with reduced power consumption in standby mode
11/29/2001DE10058227A1 Halbleiterspeicherbauelement, Durchlass-/Zwischenspeichereinheit hierfür und zugehöriges Datenübertragungsverfahren A semiconductor memory device, transmission / latch unit therefor, and associated data transfer process
11/29/2001DE10023362A1 Verstärkerschaltungsanordnung Amplifier circuitry
11/29/2001CA2409214A1 Block ram having multiple configurable write modes for use in a field programmable gate array
11/28/2001EP1158536A2 Semiconductor memory device
11/28/2001EP1158535A2 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
11/28/2001EP1158534A2 Semiconductor memory device
11/28/2001EP1158532A2 Semiconductor memory device
11/28/2001EP1158531A2 Semiconductor memory device
11/28/2001EP1158530A2 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
11/28/2001EP1158526A2 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
11/28/2001EP1158525A1 Voice message managing method, in particular for voice data recording/playing/editing electronic devices
11/28/2001EP1157387A1 Full page increment/decrement burst for ddr sdram/sgram
11/28/2001EP0929901B1 Memory array, memory cell, and sense amplifier test and characterization
11/28/2001EP0929900B1 Data retention test for static memory cell
11/28/2001EP0929898B1 Memory block select using multiple word lines to address a single memory cell row
11/28/2001EP0929896B1 Memory including resistor bit-line loads
11/28/2001EP0929895B1 Active power supply filter
11/27/2001US6324626 Semiconductor memory
11/27/2001US6324122 RAM synchronized with a signal
11/27/2001US6324120 Memory device having a variable data output length
11/27/2001US6324119 Data input circuit of semiconductor memory device
11/27/2001US6324118 Synchronous semiconductor memory device having improved operational frequency margin at data input/output
11/27/2001US6324115 Semiconductor memory device with burst mode access
11/27/2001US6324112 Reading device and method for integrated circuit memory
11/27/2001US6324111 Semiconductor memory
11/27/2001US6324110 High-speed read-write circuitry for semi-conductor memory
11/27/2001US6324109 Semiconductor storage device capable of increasing access time speed
11/27/2001US6324094 Apparatus for reading state of multistate non-volatile memory cells
11/27/2001US6324090 Nonvolatile ferroelectric memory device
11/27/2001US6323705 Double cycle lock approach in delay lock loop circuit
11/27/2001US6323693 Current sense amplifier circuit using dummy bit line
11/27/2001CA2099911C Method and system for transactioning of modifications to a tree structured file
11/22/2001WO2001088923A1 Improved calibration technique for memory devices
11/22/2001WO2001088714A1 Multiple access per cycle in a multiple bank dimm
11/22/2001US20010044918 Semiconductor integrated circuit and design method and manufacturing method of the same
11/22/2001US20010044882 Multiple port memory apparatus
11/22/2001US20010044875 Method for switching between modes of operation
11/22/2001US20010043507 Synchronous semiconductor memory device capable of high speed reading and writing
11/22/2001US20010043505 Integrated circuit memory devices that utilize indication signals to increase reliability of reading and writing operations and methods of operating same
11/22/2001US20010043504 Semiconductor memory device and synchronous memory
11/22/2001US20010043503 Method and circuit configuration for read-write mode control of a synchronous memory
11/22/2001US20010043500 Semiconductor device
11/22/2001US20010043487 Semiconductor memory device
11/22/2001US20010043483 Layout structure and method of a column path of a semiconductor memory device
11/22/2001US20010043482 Semiconductor memory device
11/22/2001US20010043119 Amplifier circuit
11/22/2001US20010043104 Delay circuit applied to semiconductor memory device having auto power-down function
11/22/2001US20010043102 Internal clock signal generating circuit permitting rapid phase lock
11/22/2001US20010043100 Integrated circuit device incorporating dll circuit
11/22/2001US20010043099 Input circuit and semiconductor integrated circuti having the input circuit
11/22/2001US20010043097 Sync signal generating circuit provided in semiconductor integrated circuit
11/22/2001US20010043089 Dram sense amplifier for low voltages
11/22/2001US20010043087 Sense amplifying circuit
11/22/2001DE10123514A1 Semiconductor memory component, such as multiport SRAM cell with two word lines and CMOS structure
11/22/2001DE10022263A1 Memory sense amplifier circuit, has precharging circuit and two amplifier stages that can be initialized to voltage supply and earth potentials respectively
11/22/2001DE10021776A1 Layout eines Sense-Verstärkers mit beschleunigter Signalauswertung Layout of a sense amplifier with accelerated signal analysis
11/21/2001EP1156490A1 Semiconductor integrated circuit, ink cartridge having this semiconductor integrated circuit, and ink jet recording device mounted with this ink cartridge
11/21/2001EP1156420A1 Clock phase adjustment method, and integrated circuit and design method therefor
11/21/2001EP1155412A1 Self-calibrating self-regenerative comparator circuit and method
11/21/2001EP0929897B1 Dram
11/20/2001US6321343 Semiconductor memory system comprising synchronous DRAM and controller thereof
11/20/2001US6321316 Method and apparatus for local control signal generation in a memory device
11/20/2001US6320819 Semiconductor device reconciling different timing signals
11/20/2001US6320818 Semiconductor storage device, and method for generating timing of signal for activating internal circuit thereof
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