Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
10/2001
10/16/2001US6304491 Integrated semiconductor memory
10/16/2001US6304482 Apparatus of reducing power consumption of single-ended SRAM
10/16/2001US6304479 Shielded bit line architecture for memory arrays
10/16/2001US6304123 Data storage circuits using a low threshold voltage output enable circuit
10/16/2001US6304114 Mode setting determination signal generation circuit
10/11/2001WO2001075898A2 Interface command architecture for synchronous flash memory
10/11/2001WO2001075897A2 Synchronous flash memory
10/11/2001WO2001075896A2 Flash with consistent latency for read operations
10/11/2001WO2001075895A2 Elimination of precharge operation in synchronous flash memory
10/11/2001WO2001075893A2 Symmetrical protection scheme for first and last sectors of synchronous flash memory
10/11/2001WO2001075892A2 Synchronous flash memory with concurrent write and read operation
10/11/2001WO2001075891A2 Current conveyor and method for readout of mtj memories
10/11/2001WO2001075890A2 Synchronous flash memory with non-volatile mode register
10/11/2001WO2001075623A2 Zero-latency-zero bus turnaround synchronous flash memory
10/11/2001US20010029575 Synchronization circuit for read paths of an eletronic memory
10/11/2001US20010029566 Rambus DRAM
10/11/2001US20010029563 ATD generation in a synchronous memory
10/11/2001US20010029402 Electronic device for the recording/reproduction of voice data
10/11/2001US20010028599 Semiconductor memory device outputting data according to a first internal clock signal and a second internal clock signal
10/11/2001US20010028598 Column decoder circuit for page reading of a semiconductor memory
10/11/2001US20010028594 Semiconductor memory device
10/11/2001US20010028593 Semiconductor memory
10/11/2001US20010028592 Semiconductor memory
10/11/2001US20010028588 Semiconductor memory
10/11/2001US20010028587 Semiconductor memory device in which high speed reading operation is possible
10/11/2001US20010028586 Row decoded biasing of sense amplifier for improved one's margin
10/11/2001US20010028583 Semiconductor memory device having data parallel/serial conversion function and capable of efficiently performing operational test
10/11/2001US20010028581 Semiconductor device
10/11/2001US20010028579 High-speed cycle clock-synchronous memory device
10/10/2001EP1143647A2 Apparatus for recording a radio broadcast signal in real time and for reproducing the broadcast signal when a user desires to listen to it
10/10/2001EP1143452A2 Memory circuitry for programmable logic integrated circuit devices
10/10/2001EP1141961A1 Integrated circuit with a non-volatile mos ram cell
10/10/2001EP1141959A1 Integrated memory
10/10/2001EP1141951A2 A digital memory structure and device, and methods for the management thereof
10/10/2001EP1141818A1 Device with speech signal input means and control signal input means
10/10/2001EP1048109A4 Current control technique
10/10/2001CN1316877A Portable voice device
10/09/2001US6301649 Semiconductor circuit with address translation circuit that enables quick serial access in row or column directions
10/09/2001US6301191 Semiconductor memory device allowing reduction in power consumption during standby
10/09/2001US6301189 Apparatus for generating write control signals applicable to double data rate SDRAM
10/09/2001US6301188 Method and apparatus for registering free flow information
10/09/2001US6301187 Synchronous type semiconductor memory device permitting reduction in ratio of area occupied by control circuit in chip area
10/09/2001US6301185 Random access memory with divided memory banks and data read/write architecture therefor
10/09/2001US6301184 Semiconductor integrated circuit device having an improved operation control for a dynamic memory
10/09/2001US6301183 Enhanced bus turnaround integrated circuit dynamic random access memory device
10/09/2001US6301182 Semiconductor memory device
10/09/2001US6301180 Sense amplifier circuit and semiconductor storage device
10/09/2001US6301179 Self-equalized low power precharge sense amp for high speed SRAMs
10/09/2001US6301178 Reduced cell voltage for memory device
10/09/2001US6301176 Asynchronous memory self time scheme
10/09/2001US6301175 Memory device with single-ended sensing and low voltage pre-charge
10/09/2001US6301174 Power conservation during memory read operations
10/09/2001US6301173 Memory device with faster reset operation
10/09/2001US6301169 Semiconductor memory device with IO compression test mode
10/09/2001US6301166 Parallel tester capable of high speed plural parallel test
10/09/2001US6301160 Bus driving circuit and memory device having same
10/09/2001US6301144 Semiconductor memory device
10/09/2001US6300816 Feedforward-controlled sense amplifier
10/04/2001WO2001073540A2 METHOD AND APPARATUS FOR TIMING-DEPENDENT TRANSFERS USING FIFOs
10/04/2001US20010027546 Semiconductor integrated circuit
10/04/2001US20010027507 Multiplexed data transfer arrangement including a multi-phase signal generator for latency control
10/04/2001US20010026966 Integrated circuit containing a number of subcircuits
10/04/2001US20010026496 Semiconductor memory device allowing increase in capacity and operation speed with a suppressed layout area
10/04/2001US20010026493 Method and apparatus for completely hiding refresh operations in a dram device using clock division
10/04/2001US20010026490 Sense amplifier
10/04/2001US20010026488 Semiconductor memory and method of saving energy of the memory
10/04/2001US20010026483 Semiconductor memory device
10/04/2001US20010026478 Semiconductor memory device
10/04/2001US20010026475 Semiconductor integrated circuit
10/04/2001US20010026474 Semiconductor storage device
10/04/2001US20010026183 Signal processing circuits having a pair of delay locked loop (DLL) circuits for adjusting a duty-cycle of a periodic digital signal and methods of operating same
10/04/2001EP1139569A1 Adjustment of the duty-cycle of a periodic digital signal with leading and triling edge DLLs
10/04/2001EP1139567A1 Level converter circuit
10/04/2001DE10113714A1 Eingabe/Ausgabe-Abtastverstärkerschaltung für ein Halbleiterspeicherbauelement Input / output sense amplifier for a semiconductor memory device
10/04/2001DE10105627A1 Multi-pin memory device operating method e.g. for data processing system, uses a multiplexer for each two or more associated read terminals of the memory arrangements
10/03/2001CN1315728A Real-time record player for radio broadcasting
10/02/2001US6298004 Semiconductor device, semiconductor system, and digital delay circuit
10/02/2001US6298003 Boost circuit of DRAM with variable loading
10/02/2001US6298002 Memory structures having selectively disabled portions for power conservation
10/02/2001US6297998 Method and apparatus for programmable control signal generation for a semiconductor device
10/02/2001US6297996 Test mode activation and data override
10/02/2001US6297857 Method for accessing banks of DRAM
10/02/2001US6297682 Differential sense amplifier circuit
10/02/2001US6297674 Semiconductor integrated circuit for low power and high speed operation
10/02/2001US6297670 Single-ended sense amplifier with adjustable noise margin and power down control
09/2001
09/27/2001WO2001071724A1 Method and apparatus for an easy identification of a state of a dram generator controller
09/27/2001WO2001071608A2 System, method and apparatus for controlling the dissemination of digital works
09/27/2001US20010025350 Synchronous circuit
09/27/2001US20010024859 Semiconductor integrated circuit device and a method of manufacturing thereof
09/27/2001US20010024398 Memory device with support for unaligned access
09/27/2001US20010024397 Semiconductor memory device
09/27/2001US20010024395 Sense amplifier circuit for use in a semiconductor memory device
09/27/2001US20010024393 Memory-in recording medium controlling system and controller
09/27/2001US20010024383 Semiconductor memory device
09/27/2001US20010024382 Semiconductor memory device
09/27/2001US20010024381 Current sense amplifier circuit
09/27/2001US20010024136 Semiconductor integrated circuit compensating variations of delay time
09/27/2001US20010024135 Method and apparatus for generating a sequence of clock signals
09/27/2001US20010024130 Level converter circuit
09/27/2001DE10014362A1 Audio information playback with insertable magnetic tape cassette contg. stored information to be played back