Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
02/2002
02/28/2002US20020024832 Semiconductor memory device
02/28/2002US20020024453 Semiconductor device, terminal device and communication method
02/28/2002US20020024378 Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits
02/28/2002US20020024365 Gate coupled voltage support for an output driver circuit
02/28/2002US20020024063 Layout structure for dynamic random access memory
02/28/2002US20020024062 Semiconductor integrated circuit
02/28/2002US20020024059 MIS semiconductor device having improved gate insulating film reliability
02/28/2002DE10039350A1 Integrierte Schaltung, Testaufbau und Verfahren zum Testen von integrierten Schaltungen An integrated circuit test set-up and method for testing integrated circuits
02/27/2002EP1181694A1 Plateline sensing
02/27/2002EP1181691A1 Read-write amplifier for a dram memory cell and dram memory
02/27/2002EP1181631A1 Electric circuit management method and device
02/27/2002EP0784847B1 A memory device
02/27/2002CN1338106A Semiconductor integrated circuit, ink cartridge having this semiconductor integrated circuit, and ink jet recording device mounted this ink cartridge
02/27/2002CN1337709A Generation of reference signal of magnetic random access storage device
02/27/2002CN1337708A Electric current driving device and magnetic-resistance storage
02/27/2002CN1337707A Semiconductor storage apparatus for increasing bus efficiency and storage system
02/26/2002US6351434 Synchronous counter for electronic memories
02/26/2002US6351433 Semiconductor memory device employing pipeline operation with reduced power consumption
02/26/2002US6351432 Synchronous semiconductor memory apparatus and input information latch control method thereof
02/26/2002US6351431 Semiconductor memory device
02/26/2002US6351427 Stored write scheme for high speed/wide bandwidth memory devices
02/26/2002US6351424 Cancellation of redundant elements with a cancel bank
02/26/2002US6351423 Semiconductor memory device including sense amplifier circuit differing in drivability between data write mode and data read mode
02/26/2002US6351422 Integrated memory having a differential sense amplifier
02/26/2002US6351421 Data output buffer
02/26/2002US6351419 Integrated memory with a block writing function and global amplifiers requiring less space
02/26/2002US6351416 Current sense amplifier circuit
02/26/2002US6351413 Nonvolatile memory device, in particular a flash-EEPROM
02/26/2002US6351404 Synchronous dynamic random access memory device
02/26/2002US6351176 Pulsing of body voltage for improved MOS integrated circuit performance
02/26/2002US6351169 Internal clock signal generating circuit permitting rapid phase lock
02/26/2002US6351166 Semiconductor device with stable and appropriate data output timing
02/26/2002US6351159 Gate coupled voltage support for an output driver circuit
02/26/2002US6351156 Noise reduction circuit
02/26/2002US6351155 High-speed sense amplifier capable of cascade connection
02/26/2002US6351148 Buffer
02/26/2002US6351139 Configuration bit read/write data shift register
02/21/2002WO2002015195A2 Method and apparatus for controlling a read valid window of a synchronous memory device
02/21/2002WO2002015194A1 Method and system for hiding refreshes in a dynamic random access memory
02/21/2002WO2002015192A1 Control module comprising a read-only memory with reduced power consumption
02/21/2002WO2002015019A1 Method and system for using dynamic random access memory as cache memory
02/21/2002WO2001057871A3 Memory module with hierarchical functionality
02/21/2002US20020023238 Fifo memory control circuit
02/21/2002US20020023200 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
02/21/2002US20020023197 Memory controller and data processing system
02/21/2002US20020023191 Semiconductor memory device and memory system using the same
02/21/2002US20020023028 Retailing audio files in a fuel dispensing environment
02/21/2002US20020021617 Clock-synchronous semiconductor memory device
02/21/2002US20020021616 Method and apparatus for crossing clock domain boundaries
02/21/2002US20020021615 Semiconductor integrated circuit
02/21/2002US20020021610 Antifuse detection circuit
02/21/2002US20020021609 Semiconductor memory device with concurrent refresh and data access operation
02/21/2002US20020021608 Semiconductor memory device
02/21/2002US20020021598 Nonvolatile memory, system having nonvolatile memories, and data read method of the system
02/21/2002US20020021596 Integrated circuit for memory card and memory card using the circuit
02/21/2002US20020021591 Plural line buffer type memory LSI
02/21/2002US20020021586 Semiconductor memory device for providing margin of data setup time and data hold time of data terminal
02/21/2002US20020021581 Source and drain sensing
02/21/2002US20020021152 DLL circuit and method of generating timing signals
02/21/2002US20020021147 Sense amplifiers having gain control circuits therein that inhibit signal oscillations
02/21/2002US20020020854 Integrated circuit, test structure and method for testing integrated circuits
02/21/2002DE10055242C1 IC switch stage circuit with internal voltage supply has control circuit used for initializing switch stage during power-up
02/21/2002CA2419795A1 Control module comprising a read-only memory with reduced power consumption
02/20/2002EP1180799A2 Semiconductor memory device and method of manufacturing the same
02/19/2002US6349399 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
02/19/2002US6349379 System for executing instructions having flag for indicating direct or indirect specification of a length of operand data
02/19/2002US6349072 Random access memory device
02/19/2002US6349071 Synchronous semiconductor storage device
02/19/2002US6349067 System and method for preventing noise cross contamination between embedded DRAM and system chip
02/19/2002US6349065 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing
02/19/2002US6349059 Method for reading data from a non-volatile memory device with autodetect burst mode reading and corresponding reading circuit
02/19/2002US6349058 Electronic circuit and method for storing configuration and calibration information in a non-volatile memory array
02/19/2002US6349057 Read protection circuit of nonvolatile memory
02/19/2002US6349051 High speed data bus
02/19/2002US6349050 Methods and systems for reducing heat flux in memory systems
02/19/2002US6348827 Programmable delay element and synchronous DRAM using the same
02/19/2002US6348822 Semiconductor storage device capable of speeding up an access from a standby state
02/14/2002WO2002013384A1 Timer circuit and semiconductor memory incorporating the timer circuit
02/14/2002WO2002013198A1 High speed sense amplifier
02/14/2002US20020019918 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
02/14/2002US20020019890 Method for scheduling execution sequence of read and write operations
02/14/2002US20020018526 Data transmission system of directional coupling type using forward wave and reflection wave
02/14/2002US20020018513 Memory
02/14/2002US20020018396 Semiconductor device
02/14/2002US20020018395 Method and apparatus for multiple latency synchronous dynamic random access memory
02/14/2002US20020018394 Semiconductor memory device
02/14/2002US20020018393 Semiconductor memory device and memory system for improving bus efficiency
02/14/2002US20020018391 Memory circuit architecture
02/14/2002US20020018389 Data storing method of dynamic RAM and semiconductor memory device
02/14/2002US20020018388 Semiconductor device, method for refreshing the same, and electronic equipment
02/14/2002US20020018386 Semiconductor circuit device with reduced power consumption in slow operation mode
02/14/2002US20020018383 Semiconductor memory device
02/14/2002US20020018381 Method of testing a memory array
02/14/2002US20020018372 Single-event upset tolerant latch for sense amplifiers
02/14/2002US20020018359 Semiconductor memory device
02/14/2002US20020018058 RAM-incorporated driver, and display unit and electronic equipment using the same
02/14/2002US20020017944 Method and apparatus for glitch protection for input buffers in a source-synchronous environment
02/14/2002US20020017939 Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory
02/14/2002US20020017929 Semiconductor memory device having a controlled output driver characteristic
02/14/2002US20020017927 Data output circuit having first and second sense amplifiers