Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
02/2002
02/14/2002US20020017922 Charge sharing and charge recycling for an on-chip bus
02/14/2002DE10131651A1 Verzögerungsregelschleife zur Verwendung in einem Halbleiterspeicherbauteil Delay-locked loop for use in a semiconductor memory device
02/14/2002DE10125724A1 Memory device, memory system and method for access to data in memory, for use in dynamic random-access memory units, in information technology
02/14/2002DE10054521A1 Method for reading data from a memory arrangement e.g. for semiconductor memory devices such as MRAM, has address decoder connected to word- and to bit-line decoders
02/14/2002DE10036914A1 Integrierte Schaltung mit Temperatursensor Integrated circuit with temperature sensor
02/13/2002EP1179252A1 Differential receiver
02/13/2002EP1179240A1 Audio data playback management system and method with editing apparatus and recording medium
02/13/2002EP0925665B1 Method of cryptological authentification in a scanning identification system
02/13/2002CN1335953A Entertainment device, information processor, and portable recorder
02/12/2002US6347394 Buffering circuit embedded in an integrated circuit device module used for buffering clocks and other input signals
02/12/2002US6347367 Data bus structure for use with multiple memory storage and driver receiver technologies and a method of operating such structures
02/12/2002US6347357 Enhanced DRAM with embedded registers
02/12/2002US6347356 Burst length discriminating circuit for use in synchronous semiconductor memory and having a predetermined initialized state of power-up
02/12/2002US6347064 Synchronous mask ROM device operable in consecutive read operation
02/12/2002US6347062 Semiconductor memory device
02/12/2002US6347058 Sense amplifier with overdrive and regulated bitline voltage
02/12/2002US6347057 Semiconductor memory device with sense amplifier block
02/12/2002US6347055 Line buffer type semiconductor memory device capable of direct prefetch and restore operations
02/12/2002US6347047 Mask ROM semiconductor memory device capable of synchronizing the activation of the sense amplifier and of the word line
02/12/2002US6346839 Low power consumption integrated circuit delay locked loop and method for controlling the same
02/12/2002US6346830 Data input/output circuit and interface system using the same
02/07/2002WO2002011355A1 Apparatus and method for operating a master-slave system with a clock signal and a separate phase signal
02/07/2002WO2002011148A1 Synchronous flash memory with status burst output
02/07/2002WO2002011147A2 Integrated circuit with a temperature sensor
02/07/2002US20020016895 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
02/07/2002US20020016885 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
02/07/2002US20020016884 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
02/07/2002US20020016876 System having double data transfer rate and integrated circuit therefor
02/07/2002US20020016644 Recording apparatus, reproducing apparatus, and recording and/or reproducing apparatus
02/07/2002US20020016032 Semiconductor device, method for refreshing the same, and electronic equipment
02/07/2002US20020015362 Personal audio player with a removable multi-function module
02/07/2002US20020015353 Programmable counter circuit for generating a sequential/interleave address sequence
02/07/2002US20020015352 Echo clock generating circuit of semiconductor memory device and method thereof
02/07/2002US20020015351 Method of operating a memory device having a variable data input length
02/07/2002US20020015350 Fast accessible semiconductor memory device
02/07/2002US20020015349 Semiconductor integrated circuit device
02/07/2002US20020015346 Dynamic random access memory device and process for controlling a read access of such a memory
02/07/2002US20020015345 Reading device and method for integrated circuit memory
02/07/2002US20020015344 High-speed read-write circuitry for semi-conductor memory devices
02/07/2002US20020015339 Data storage device and data storing method
02/07/2002US20020015338 Delay locked loop for use in semiconductor memory device
02/07/2002US20020015333 Semiconductor memory device
02/07/2002US20020015331 Circuit configuration for reading and writing information at a memory cell field
02/07/2002US20020014903 Semiconductor device using complementary clock and signal input state detection circuit used for the same
02/07/2002US20020014635 Mode selection circuit for semiconductor memory device
02/06/2002EP1177558A1 Ampic dram
02/06/2002EP1177557A1 Multi-format personal digital audio player
02/06/2002EP1177556A1 Information processing apparatus with device and method for permanent data storage
02/06/2002CN1078960C Non-volatile semiconductor memory unit
02/05/2002US6345334 High speed semiconductor memory device capable of changing data sequence for burst transmission
02/05/2002US6345321 Multiple-mode memory component
02/05/2002US6345011 Input/output line structure of a semiconductor memory device
02/05/2002US6345010 Semiconductor storage device
02/05/2002US6345008 Fast reprogrammable FIFO status flags system
02/05/2002US6345006 Memory circuit with local isolation and pre-charge circuits
02/05/2002US6345002 RAS monitor circuit and field memory using the same
02/05/2002US6344990 DRAM for storing data in pairs of cells
02/05/2002US6344763 Semiconductor integrated circuit device that can suppress generation of signal skew between data input/output terminals
02/05/2002US6344760 Sense amplifier drive circuit
02/05/2002US6343740 Oblique access to image data for reading apparatus
01/2002
01/31/2002WO2002008901A2 Partitioned random access memory
01/31/2002WO2001075891A3 Current conveyor and method for readout of mtj memories
01/31/2002US20020013885 Digital recording and reproducing apparatus
01/31/2002US20020013880 Integrated circuit with flash bridge and autoload
01/31/2002US20020012285 Semiconductor memory device
01/31/2002US20020012280 Nonvolatile semiconductor storage device
01/31/2002US20020012278 Burst architecture for a flash memory
01/31/2002US20020012276 Semiconductor memory device having read data multiplexer
01/31/2002US20020012266 Random access semiconductor memory with reduced signal overcoupling
01/31/2002US20020012262 High-speed low-power semiconductor memory architecture
01/31/2002US20020011998 Ram-incorporated driver, and display unit and electronic equipment using the same
01/31/2002US20020011876 Current sense amplifiers enabling amplification of bit line voltages provided by bit line sense amplifiers
01/31/2002US20020011610 Semiconductor memory device having pairs of bit lines arranged on both sides of memory cells
01/31/2002DE10035636A1 Circuit, especially semiconducting circuit, memory device, DRAM element or similar has protection device that analyzes input signal for noise, suppresses signal transfer if noise is present.
01/31/2002DE10034255A1 Schaltungsanordnung zum Lesen und Schreiben von Information an einem Speicherzellenfeld Circuit arrangement for reading and writing information on a memory cell array
01/31/2002DE10032236A1 Circuit for changing over receiver circuit, especially in DRAM memory, supplies receiver control current continuously via switches in working mode, periodically in standby mode
01/30/2002EP1176599A2 Circuit device for switching a receiver circuit, especially in DRAM memories
01/30/2002EP1176598A2 Digital recording and reproducing apparatus
01/30/2002EP1175679A1 Data balancing scheme in solid state storage devices
01/30/2002EP1175676A1 Universal player for compressed audio
01/30/2002CN2475099Y Controlling signal decision mechanism for static data memory
01/30/2002CN1333538A Arbitrary selective access semiconductor memor capable of reducing signal overcoupling
01/30/2002CN1078720C First-in first-out memory device for emabling sizes of input-output data to be different from each other and method therefor
01/29/2002US6343352 Method and apparatus for two step memory write operations
01/29/2002US6343046 Semiconductor integrated circuit device
01/29/2002US6343045 Methods to reduce the effects of leakage current for dynamic circuit elements
01/29/2002US6343041 Semiconductor integrated circuit
01/29/2002US6343040 Auto precharge control signal generating circuits for semiconductor memory devices and auto precharge control methods
01/29/2002US6343039 Data transfer circuit
01/29/2002US6343038 Semiconductor memory device of shared sense amplifier system
01/29/2002US6343036 Multi-bank dynamic random access memory devices having all bank precharge capability
01/29/2002US6343035 Semiconductor device allowing switchable use of internal data buses
01/29/2002US6342801 Duty cycle correction circuit of delay locked loop
01/29/2002US6342800 Charge compensation control circuit and method for use with output driver
01/29/2002US6342797 Delayed locked loop clock generator using delay-pulse-delay conversion
01/29/2002US6342796 Delay locked loop having fast locking time
01/29/2002US6342664 Data reproducing apparatus
01/24/2002US20020010832 Memory device which receives write masking and automatic precharge information
01/24/2002US20020010830 Method and apparatus for configuring a memory device and a memory channel using configuration space registers
01/24/2002US20020010829 Buffering circuit in a semiconductor memory device