Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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08/19/2004 | US20040160836 Semiconductor device with flexible redundancy system |
08/19/2004 | US20040160833 Synchronous semiconductor memory device allowing adjustment of data output timing |
08/19/2004 | US20040160832 Method of synchronizing read timing in a high speed memory system |
08/19/2004 | US20040160821 Hybrid semiconductor - magnetic spin based memory |
08/19/2004 | US20040160814 Hybrid semiconductor - magnetic spin based memory with low transmission barrier |
08/19/2004 | US20040160800 Stacked hybrid semiconductor-magnetic spin based memory |
08/19/2004 | US20040160796 Method of making hybrid semiconductor - magnetic spin based memory |
08/19/2004 | US20040160260 Charging circuit and semiconductor memory device using the same |
08/19/2004 | US20040160244 Sense amplifier having synchronous reset or asynchronous reset capability |
08/19/2004 | US20040160241 Open drain type output buffer |
08/19/2004 | US20040159877 Semiconductor memory device and memory system |
08/19/2004 | DE19727087B4 Synchroner graphischer Schreib/Lese-Speicher (RAM) mit Blockschreibsteuerfunktion Synchronous graphic read / write memory (RAM) with block write control function |
08/19/2004 | DE10348333A1 Verfahren und Vorrichtung zum Verkürzen von Leseoperationen in Speichern mit löschendem Lesen Method and device for shortening of read operations in the erased memories Read |
08/19/2004 | DE10308872B3 Integrated semiconductor memory circuit has additional word lines and associated blind contact structures for compensation of parasitic capacitances between bit line contacts and word lines |
08/19/2004 | CA2554546A1 Methods and apparatus for the utilization of core based nodes for state transfer |
08/18/2004 | EP1447911A1 Semiconductor device, electronic device having the same, and driving method of the same |
08/18/2004 | EP1446910A1 Phase adjustment apparatus and method for a memory device signaling system |
08/18/2004 | EP1446807A2 Sense amplifier for multilevel non-volatile integrated memory devices |
08/18/2004 | EP1446723A1 Method employed by a base station for transferring data |
08/18/2004 | CN1522445A System and method for early write to memory by holding bitline at fixed potential |
08/18/2004 | CN1521759A Data induction method used for storage cell circuit |
08/18/2004 | CN1521758A Stack pointer generator and method for generating pointers |
08/18/2004 | CN1521585A Clock control in sequential circuit for low-power operation and circuit conversion to low-power seqential circuit |
08/18/2004 | CN1162864C Integrated memory with differential read amplifier |
08/18/2004 | CN1162781C Editing device and editing method |
08/17/2004 | US6779126 Phase detector for all-digital phase locked and delay locked loops |
08/17/2004 | US6779124 Selectively deactivating a first control loop in a dual control loop circuit during data transmission |
08/17/2004 | US6779116 Playback apparatus and playback method |
08/17/2004 | US6779076 Method and system for using dynamic random access memory as cache memory |
08/17/2004 | US6779075 DDR and QDR converter and interface card, motherboard and memory module interface using the same |
08/17/2004 | US6779074 Memory device having different burst order addressing for read and write operations |
08/17/2004 | US6779055 First-in, first-out memory system having both simultaneous and alternating data access and method thereof |
08/17/2004 | US6779045 System and apparatus for increasing the number of operations per transmission for a media management system |
08/17/2004 | US6778465 Circuit and method for generating output control signal in synchronous semiconductor memory device |
08/17/2004 | US6778464 Expanded operating frequency synchronous semiconductor memory device having wave pipeline structure and wave pipeline control method thereof |
08/17/2004 | US6778463 Memory access interface for a micro-controller system with address/data multiplexing bus |
08/17/2004 | US6778461 Dynamic random access memory device externally functionally equivalent to a static random access memory |
08/17/2004 | US6778459 Fuse read sequence for auto refresh power reduction |
08/17/2004 | US6778456 Temperature detecting circuit |
08/17/2004 | US6778453 Method of storing a temperature threshold in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit and memory integrated circuit |
08/17/2004 | US6778452 Circuit and method for voltage regulation in a semiconductor device |
08/17/2004 | US6778451 Semiconductor memory device for masking all bits in a test write operation |
08/17/2004 | US6778448 Semiconductor memory and output signal control method and circuit in semiconductor memory |
08/17/2004 | US6778447 Embedded DRAM system having wide data bandwidth and data transfer data protocol |
08/17/2004 | US6778445 Pipeline nonvolatile memory device with multi-bit parallel read and write suitable for cache memory. |
08/17/2004 | US6778444 Buffer for a split cache line access |
08/17/2004 | US6778435 Memory architecture for TCCT-based memory cells |
08/17/2004 | US6778114 Escalator code-based DAC and delay-locked loop apparatus and corresponding methods |
08/17/2004 | US6778000 Integrated circuit devices that provide constant time delays irrespective of temperature variation |
08/17/2004 | US6777987 Signal buffer for high-speed signal transmission and signal line driving circuit including the same |
08/17/2004 | US6777985 Input/output buffer having reduced skew and methods of operation |
08/17/2004 | US6777710 Organic light emitting device with constant luminance |
08/12/2004 | WO2004068379A1 Information processing system, information processing device, information processing method, program, and recording medium |
08/12/2004 | WO2004047364A3 Memory system, in particular for network broadcasting applications such as video/audio applications, and method for operating a memory system |
08/12/2004 | WO2004012196A3 Semiconductor memory device and method for initializing the same |
08/12/2004 | US20040158785 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same |
08/12/2004 | US20040158690 Balanced sense amplifier control for open digit line architecture memory devices |
08/12/2004 | US20040158689 System and software for matched aligned and unaligned storage instructions |
08/12/2004 | US20040156261 System and method for low area self-timing in memory devices |
08/12/2004 | US20040156260 Main word line driver circuit receiving negative voltage in semiconductor memory device |
08/12/2004 | US20040156256 Physically alternating sense amplifier activation |
08/12/2004 | US20040156253 Integrated memory and method for operating it |
08/12/2004 | US20040156248 Programmable processor and method for matched aligned and unaligned storage instructions |
08/12/2004 | US20040156247 Method of fabricating non-volatile memory device |
08/12/2004 | US20040156245 Measure-controlled circuit with frequency control |
08/12/2004 | US20040156243 Circuit configuration for reading out a programmable link |
08/12/2004 | US20040156242 Nonvolatile memory |
08/12/2004 | US20040156227 Reducing sub-threshold leakage in a memory array |
08/12/2004 | US20040155698 Semiconductor device, electronic device having the same, and driving method of the same |
08/12/2004 | US20040155682 High-speed cross-coupled sense amplifier |
08/12/2004 | US20040155315 Circuits and methods to protect a gate dielectric antifuse |
08/12/2004 | US20040155314 Semiconductor integrated circuits with power reduction mechanism |
08/12/2004 | US20040155302 Three-dimensional memory cells and peripheral circuits |
08/12/2004 | US20040155301 Three-dimensional-memory-based self-test integrated circuits and methods |
08/12/2004 | DE10302650A1 RAM memory with shared SA structure, e.g. DRAM semiconductor memory, has a sense amplifier that can be separately switched for each individual control line |
08/12/2004 | DE10302287A1 Speichervorrichtung für eine Multibus-Architektur Storage device for a multi-bus architecture |
08/12/2004 | DE10260602B3 Sense amplifier for bit line signals in dynamic random-access memory using cross-coupled switching device including holding device for holding switched signal level of bit line signals |
08/12/2004 | DE10081727B3 Mobiles Karaoke-System, Sender, Cartridge und Verfahren zur Verhinderung unbefugten Zugriffs Portable Karaoke System, Transmitter, cartridge and procedures to prevent unauthorized access |
08/11/2004 | CN1520593A Sense amplifier with improved latching |
08/11/2004 | CN1520555A System and method for delaying strobe signal |
08/11/2004 | CN1520036A 输入缓冲电路 Input buffer circuit |
08/11/2004 | CN1519934A Delay locking loop of reinforced interfrence proof phase swinging of blocking circuit and its method |
08/11/2004 | CN1519860A Low voltage read amplifier device |
08/11/2004 | CN1519857A Semiconductor memory appts. having magnetic interference ruduced |
08/11/2004 | CN1519855A Storage device possessing electricity saving mode and electronic equipment using storage device possessing electricity saving mode |
08/11/2004 | CN1519854A Read-write switching method for memory controller |
08/11/2004 | CN1519853A On-die termination circuit and method for reducing on-chip DC current, and memory system including memory device having same |
08/11/2004 | CN1519846A Appts. and method with checking and erasing and correcting functions |
08/11/2004 | CN1161789C Semiconductor apparatus |
08/11/2004 | CN1161786C Recording/reproducing device and recording/reproducing method |
08/10/2004 | US6775759 Sequential nibble burst ordering for data |
08/10/2004 | US6775753 Storage and reproduction apparatus utilizing interrupted operation |
08/10/2004 | US6775736 Embedded DRAM system having wide data bandwidth and data transfer data protocol |
08/10/2004 | US6775648 Dictation and transcription apparatus |
08/10/2004 | US6775201 Method and apparatus for outputting burst read data |
08/10/2004 | US6775194 Standby current reduction circuit applied in DRAM |
08/10/2004 | US6775192 Memory device tester and method for testing reduced power states |
08/10/2004 | US6775191 Memory circuit with selective address path |
08/10/2004 | US6775190 Semiconductor memory device with detection circuit |
08/10/2004 | US6775189 Option fuse circuit using standard CMOS manufacturing process |