Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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10/06/2004 | CN1534684A Nonvolatile memory |
10/05/2004 | US6801980 Destructive-read random access memory system buffered with destructive-read memory cache |
10/05/2004 | US6801815 Sound and image producing system |
10/05/2004 | US6801466 Circuit for controlling a reference node in a sense amplifier |
10/05/2004 | US6801465 Apparatus and method for a memory storage cell leakage cancellation scheme |
10/05/2004 | US6801464 Semiconductor memory device |
10/05/2004 | US6801463 Method and apparatus for leakage compensation with full Vcc pre-charge |
10/05/2004 | US6801460 Semiconductor memory device suppressing peak current |
10/05/2004 | US6801448 Common bit/common source line high density 1T1R R-RAM array |
10/05/2004 | US6801446 Read only memory devices with independently precharged virtual ground and bit lines and methods for operating the same |
10/05/2004 | US6801445 Multiple level RAM device |
10/05/2004 | US6801204 Checkerboard buffer using memory blocks |
10/05/2004 | US6801144 Semiconductor memory device inputting/outputting data synchronously with clock signal |
10/05/2004 | US6801079 Ultra-low current band-gap reference |
10/05/2004 | US6801070 Measure-controlled circuit with frequency control |
09/30/2004 | WO2004084370A1 Method and protection device for the fail-safe parameterisation of electronic modules, especially low voltage power switches |
09/30/2004 | WO2004084233A1 Momory system having fast and slow data reading mechanisms |
09/30/2004 | WO2004084231A1 Universal memory device having a profil storage unit |
09/30/2004 | WO2004084226A1 Simultaneous reading from and writing to different memory cells |
09/30/2004 | WO2004084225A1 Method and apparatus for establishing and maintaining desired read latency in high-speed dram |
09/30/2004 | US20040193900 System, method and apparatus for controlling the dissemination of digital works |
09/30/2004 | US20040193842 Active memory processing array topography and method |
09/30/2004 | US20040193834 Method for optimizing utilization of a double-data-rate-SDRAM memory system |
09/30/2004 | US20040193821 Providing an arrangement of memory devices to enable high-speed data access |
09/30/2004 | US20040193805 Fifo memory devices having multi-port cache and extended capacity memory devices therein with retransmit capability |
09/30/2004 | US20040193788 Apparatus and method for pipelined memory operations |
09/30/2004 | US20040191981 Methods of fabricating an MRAM device using chemical mechanical polishing |
09/30/2004 | US20040190365 Synchronous dynamic random access memory device having memory command cancel function |
09/30/2004 | US20040190364 Clock generator for pseudo dual port memory |
09/30/2004 | US20040190363 Semiconductor memory device |
09/30/2004 | US20040190357 Redundant memory structure using bad bit pointers |
09/30/2004 | US20040190356 Apparatus and structure for rapid enablement |
09/30/2004 | US20040190353 Input buffer of semiconductor memory device |
09/30/2004 | US20040190350 Semiconductor memory device |
09/30/2004 | US20040190349 Circuit and method for decreasing the required refresh rate of DRAM devices |
09/30/2004 | US20040190348 Automatic reference voltage regulation in a memory device |
09/30/2004 | US20040190347 Dynamic column block selection |
09/30/2004 | US20040190346 Differential non-volatile memory device and bit reading method for the same |
09/30/2004 | US20040190345 Semiconductor memory device |
09/30/2004 | US20040190343 Nonvolatile memories with asymmetric transistors, nonvolatile memories with high voltage lines extending in the column direction, and nonvolatile memories with decoding circuits sharing a common area |
09/30/2004 | US20040190334 Method for reducing power consumption when sensing a resistive memory |
09/30/2004 | US20040190328 Semiconductor memory integrated circuit |
09/30/2004 | US20040190327 Sensing method and apparatus for resistance memory device |
09/30/2004 | US20040190324 Ferroelectric memory device |
09/30/2004 | US20040190323 Semiconductor memory device |
09/30/2004 | US20040189686 Method and system for producing a model from optical images |
09/30/2004 | US20040189352 Data output buffer capable of controlling data valid window in semiconductor memory devices |
09/30/2004 | US20040188735 Phase change storage cells for memory devices, memory devices having phase change storage cells and methods of forming the same |
09/30/2004 | US20040188714 Three-dimensional memory device incorporating segmented bit line memory array |
09/30/2004 | US20040187572 Vehicle speed display apparatus |
09/30/2004 | DE69333557T2 Halbleiterspeicheranordnung A semiconductor memory device |
09/30/2004 | DE69333548T2 Halbleiterspeicheranordnung A semiconductor memory device |
09/30/2004 | DE10315527B3 Input circuit for receiving signal at input of integrated circuit and evaluating relative to reference voltage has control stage for generating control voltage and differential amplifier |
09/30/2004 | DE10311428A1 Memory error checking device, especially for RAM or ROM memory chips, can be user-configured to carry out different combinations of checking and correction to suit user preferences |
09/30/2004 | DE10255872B4 Speichermodul und Verfahren zum Betrieb eines Speichermoduls in einem Datenspeichersystem Memory module and method of operating a memory module in a data storage system |
09/30/2004 | DE102004013055A1 Halbleiterspeicherbaustein mit Datenleitungsabtastverstärker Semiconductor memory device having Datenleitungsabtastverstärker |
09/29/2004 | EP1462946A1 Architecture for a serial ATA bus based flash memory apparatus |
09/29/2004 | EP1461862A1 Active termination circuit and method for controlling the impedance of external integrated circuit terminals |
09/29/2004 | CN2645130Y External mobile storage type music playback apparatus |
09/29/2004 | CN1532842A 半导体器件 Semiconductor devices |
09/29/2004 | CN1532664A Semiconductor device, semiconductor circuit, electronic device and clock signal supply and control method |
09/29/2004 | CN1169295C Locking device for standard delay locking loop |
09/29/2004 | CN1169294C Master-salve delay locked loop for accurate delay of non-periodic signals |
09/29/2004 | CN1169158C Semiconductor memory device having dynamic data amplifier capable of reducing power dissipation |
09/29/2004 | CN1169157C Write driver and bit line precharging apparatus and method |
09/29/2004 | CN1169156C Semiconuctor memory device provide with interface circuit consuming reduced amount of current consumption |
09/29/2004 | CN1169154C Semiconductive memory device capable of carrying out write-in operation at high speed |
09/29/2004 | CN1169151C 数据处理系统 The data processing system |
09/28/2004 | US6799256 System and method for multi-bit flash reads using dual dynamic references |
09/28/2004 | US6798708 Memory controller and serial memory |
09/28/2004 | US6798707 Memory control apparatus for serial memory |
09/28/2004 | US6798706 Integrated circuit with temperature sensor and method for heating the circuit |
09/28/2004 | US6798705 Noise resistant small signal sensing circuit for a memory device |
09/28/2004 | US6798704 High Speed sense amplifier data-hold circuit for single-ended SRAM |
09/28/2004 | US6798698 Nonvolatile semiconductor memory device |
09/28/2004 | US6798687 System and method for effectively implementing a high speed DRAM device |
09/28/2004 | US6798686 Semiconductor device |
09/28/2004 | US6798684 Methods and systems for programmable memory using silicided poly-silicon fuses |
09/28/2004 | US6798681 Dram |
09/28/2004 | US6798259 System and method to improve the efficiency of synchronous mirror delays and delay locked loops |
09/28/2004 | US6798252 High speed sense amplifier |
09/28/2004 | US6797997 Semiconductor memory apparatus |
09/23/2004 | WO2004082143A2 Multi-frequency synchronizing clock signal generator |
09/23/2004 | WO2004081946A1 Memory |
09/23/2004 | WO2004081945A1 Semiconductor storage device and semiconductor storage device control method |
09/23/2004 | WO2004061853A3 Method of address individual memory devices on a memory module |
09/23/2004 | WO2004061689A3 Two dimensional data eye centering for source synchronous data transfers |
09/23/2004 | US20040186957 Method and system for using dynamic random access memory as cache memory |
09/23/2004 | US20040186956 Configurable width buffered module |
09/23/2004 | US20040186950 Synchronous DRAM system with control data |
09/23/2004 | US20040186678 Sensing circuit for single bit-line semiconductor memory device |
09/23/2004 | US20040184345 Semiconductor memory device |
09/23/2004 | US20040184343 Write and erase protection in a synchronous memory |
09/23/2004 | US20040184342 Multi-ported memory cell |
09/23/2004 | US20040184341 Layout technique for address signal lines in decoders including stitched blocks |
09/23/2004 | US20040184340 Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures |
09/23/2004 | US20040184336 Reducing digit equilibrate current during self-refresh mode |
09/23/2004 | US20040184333 Integrated semiconductor memory circuit and a method for operating the same |
09/23/2004 | US20040184332 Semiconductor memory device |
09/23/2004 | US20040184329 Semiconductor device having redundancy circuit |