| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
|---|
| 10/27/2004 | CN1173402C Semiconductor integrated circuit |
| 10/27/2004 | CN1173367C Semiconductor memory device |
| 10/26/2004 | US6810500 Method for mapping a two-dimensional data array in a memory |
| 10/26/2004 | US6810497 Semiconductor integrated circuit compensating variations of delay time |
| 10/26/2004 | US6810468 Asynchronous FIFO circuit and method of reading and writing data through asynchronous FIFO circuit |
| 10/26/2004 | US6810449 Protocol for communication with dynamic memory |
| 10/26/2004 | US6810444 Memory system allowing fast operation of processor while using flash memory incapable of random access |
| 10/26/2004 | US6810441 Apparatus, method and system for reading/writing data, and medium for providing data read/write program |
| 10/26/2004 | US6809990 Delay locked loop control circuit |
| 10/26/2004 | US6809987 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure |
| 10/26/2004 | US6809984 Multiport memory circuit composed of 1Tr-1C memory cells |
| 10/26/2004 | US6809983 Clock generator for pseudo dual port memory |
| 10/26/2004 | US6809978 Implementation of a temperature sensor to control internal chip voltages |
| 10/26/2004 | US6809977 Method for reading and writing memory cells of spatial light modulators used in display systems |
| 10/26/2004 | US6809976 Non-volatile semiconductor memory device conducting read operation using a reference cell |
| 10/26/2004 | US6809975 Semiconductor memory device having test mode and memory system using the same |
| 10/26/2004 | US6809974 Controller for delay locked loop circuits |
| 10/26/2004 | US6809973 Flash memory device capable of repairing a word line |
| 10/26/2004 | US6809972 Circuit technique for column redundancy fuse latches |
| 10/26/2004 | US6809971 Diffusion replica delay circuit method |
| 10/26/2004 | US6809965 Control circuitry for a non-volatile memory |
| 10/26/2004 | US6809963 Non-volatile semiconductor memory device and method of actuating the same |
| 10/26/2004 | US6809959 Hybrid semiconductor—magnetic spin based memory with low transmission barrier |
| 10/26/2004 | US6809947 Multi-level semiconductor memory architecture and method of forming the same |
| 10/26/2004 | US6809946 Semiconductor memory device and method of controlling the same |
| 10/26/2004 | US6809914 Use of DQ pins on a ram memory chip for a temperature sensing protocol |
| 10/26/2004 | US6809336 Semiconductor device comprising sense amplifier and manufacturing method thereof |
| 10/26/2004 | US6808169 Non-volatile memory with crown electrode to increase capacitance between control gate and floating gate |
| 10/21/2004 | WO2004090984A1 Phase change memory device |
| 10/21/2004 | WO2004090905A2 Three-dimensional memory device incorporating segmented bit line memory array |
| 10/21/2004 | WO2004090826A1 Multipurpose, re-recordable audio message delivery system |
| 10/21/2004 | WO2004063906A3 Coded write masking |
| 10/21/2004 | WO2004051864B1 Dynamic real time generation of 3gpp turbo decoder interleaver sequence |
| 10/21/2004 | WO2004003700A3 An early read after write operation memory device, system and method |
| 10/21/2004 | WO2003028035A9 Multiple discharge capable bit line |
| 10/21/2004 | US20040210809 Input/output compression test circuit |
| 10/21/2004 | US20040210746 Programmable processor and system for store multiplex operation |
| 10/21/2004 | US20040210745 Multithreaded programmable processor and system with partitioned operations |
| 10/21/2004 | US20040210733 Integrated circuit having a memory cell array capable of simultaneously performing a data read operation and a data write operation |
| 10/21/2004 | US20040210730 Dram control circuit |
| 10/21/2004 | US20040210729 Nonvolatile memory |
| 10/21/2004 | US20040210728 Data processor memory circuit |
| 10/21/2004 | US20040210414 Method for measuring the delay time of a signal line |
| 10/21/2004 | US20040209490 Modules having a plurality of contacts along edges thereof configured to conduct signals to the modules and further having a plurality of contacts along edges thereof configured to conduct signals from the modules |
| 10/21/2004 | US20040208078 Memory circuit and method of reading data |
| 10/21/2004 | US20040208073 DRAM memory with a shared sense amplifier structure |
| 10/21/2004 | US20040208072 Microprocessor apparatus and method for providing configurable cryptographic key size |
| 10/21/2004 | US20040208071 Semiconductor memory device |
| 10/21/2004 | US20040208069 Column repair circuit |
| 10/21/2004 | US20040208068 Row redundancy circuit and repair method |
| 10/21/2004 | US20040208067 Row redundancy circuit |
| 10/21/2004 | US20040208065 Row redundancy memory repair scheme with shift ot eliminate timing penalty |
| 10/21/2004 | US20040208064 Method of controlling an integrated circuit capable of simultaneously performing a data read operation and a data write operation |
| 10/21/2004 | US20040208061 Non-volatile semiconductor memory device and electric device with the same |
| 10/21/2004 | US20040208045 Column select circuit of ferroelectric memory |
| 10/21/2004 | US20040208044 Over-driven access method and device for ferroelectric memory |
| 10/21/2004 | US20040208043 Feram memory device |
| 10/21/2004 | US20040208037 Distributed, highly configurable modular predecoding |
| 10/21/2004 | US20040207544 Memory interface system |
| 10/21/2004 | US20040207100 Semiconductor latches and sram devices |
| 10/21/2004 | DE19727262B4 Halbleiterspeichervorrichtung mit über Leckdetektionsmittel gesteuerter Substratspannungserzeugungsschaltung A semiconductor memory device with more than leak detection means controlled substrate voltage generating circuit |
| 10/21/2004 | DE10346559A1 Dateninvertierungsschaltung und Halbleitervorrichtung Data inverting circuit and semiconductor device |
| 10/21/2004 | DE10316453A1 Determination of the end of a programming or erasing process for a memory uses a status indicator to trigger an interrupt |
| 10/21/2004 | DE10313605A1 Vorrichtung und Verfahren zum Steuern eines oder mehrerer Speicherbausteine Apparatus and method for controlling one or more memory devices |
| 10/21/2004 | DE102004016403A1 Halbleiterspeicherbaustein sowie zugehörige Betriebs- und Leseverfahren Semiconductor memory device and associated operating and reading method |
| 10/20/2004 | EP1469481A2 Apparatus and method for managing bad blocks in a flash memory |
| 10/20/2004 | EP1469480A2 Non-volatile semiconductor memory device, electronic card using the same and electronic apparatus |
| 10/20/2004 | EP1469395A1 Memory interface system |
| 10/20/2004 | EP0948792B1 Method and apparatus for sharing sense amplifiers between memory banks |
| 10/20/2004 | CN1539148A Independent asynchronous boot block for synchronous non-voltatile memory devices |
| 10/20/2004 | CN1538698A 存储器接口系统 Memory Interface System |
| 10/20/2004 | CN1538521A Semiconductor integrated circuit electronic apparatus and back grid potential control method of transistor |
| 10/20/2004 | CN1538459A Semiconductor storage device |
| 10/20/2004 | CN1538454A Buffer amplifier |
| 10/20/2004 | CN1538451A Data output buffer capable of controlling data valid window in semiconductor memory devices |
| 10/20/2004 | CN1538450A Optical disc reproducing device and mirror detecting method of disc |
| 10/20/2004 | CN1538449A Non-volatile semiconductor memory, electronic card and electronic device |
| 10/19/2004 | US6807650 DDR-II driver impedance adjustment control algorithm and interface circuits |
| 10/19/2004 | US6807613 Synchronized write data on a high speed memory bus |
| 10/19/2004 | US6807598 Integrated circuit device having double data rate capability |
| 10/19/2004 | US6807591 Method and apparatus for playing multi-function device |
| 10/19/2004 | US6807500 Method and apparatus providing improved data path calibration for memory devices |
| 10/19/2004 | US6807126 Semiconductor memory device and electronic information device using the same |
| 10/19/2004 | US6807125 Circuit and method for reading data transfers that are sent with a source synchronous clock signal |
| 10/19/2004 | US6807120 Dynamic random access memory (DRAM) capable of canceling out complementary noise developed in plate electrodes of memory cell capacitors |
| 10/19/2004 | US6807114 Method and system for selecting redundant rows and columns of memory cells |
| 10/19/2004 | US6807112 Mask programmable read only memory |
| 10/19/2004 | US6807111 Voltage and temperature compensated pulse generator |
| 10/19/2004 | US6807110 Semiconductor memory device |
| 10/19/2004 | US6807108 Semiconductor memory device having select circuit |
| 10/19/2004 | US6807107 Semiconductor memory with shadow memory cell |
| 10/19/2004 | US6807090 Method of making hybrid semiconductor—magnetic spin based memory |
| 10/19/2004 | US6807084 FeRAM memory device |
| 10/19/2004 | US6807024 Reproducing apparatus and reproducing method |
| 10/19/2004 | US6806582 PAD arrangement in semiconductor memory device and method of driving semiconductor device |
| 10/19/2004 | US6806550 Evaluation configuration for semiconductor memories |
| 10/19/2004 | US6806527 Recessed magnetic storage element and method of formation |
| 10/19/2004 | US6806137 Trench buried bit line memory devices and methods thereof |
| 10/14/2004 | WO2004088667A1 Semiconductor memory |
| 10/14/2004 | WO2004061672A3 Read-write switching method for a memory controller |