Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/2006
11/09/2006WO2006119017A1 Configuration finalization on first valid nand command
11/09/2006WO2006118601A1 Integrated circuit having a non-volatile memory with discharge rate control and method therefor
11/09/2006WO2006028623A3 Programmable logic auto write-back
11/09/2006US20060253723 Semiconductor memory and method of correcting errors for the same
11/09/2006US20060253666 Data processor memory circuit
11/09/2006US20060253665 Memory devices and access methods
11/09/2006US20060253211 Recording apparatus, reproducing apparatus, and recording and/or reproducing apparatus
11/09/2006US20060250881 Memory arrangement having a plurality of RAM chips
11/09/2006US20060250876 Semiconductor device
11/09/2006US20060250874 Refresh control circuit and method thereof and bank address signal change circuit and methods thereof
11/09/2006US20060250873 Dynamic semiconductor storage device
11/09/2006US20060250872 AC sensing for a resistive memory
11/09/2006US20060250871 Sample and hold memory sense amplifier
11/09/2006US20060250870 Semiconductor memory device
11/09/2006US20060250869 Semiconductor memory device
11/09/2006US20060250868 Electronic component with improved precharging
11/09/2006US20060250862 Per-Bit Set-Up and Hold Time Adjustment for Double-Data Rate Synchronous DRAM
11/09/2006US20060250861 Semiconductor memory device and latency signal generating method thereof
11/09/2006US20060250860 Random access memory with stability enhancement and early ready elimination
11/09/2006US20060250859 Delay locked loop with frequency control
11/09/2006US20060250858 Register configuration control device, register configuration control method, and program for implementing the method
11/09/2006US20060250857 Non-volatile memory cell integrated with a latch
11/09/2006US20060250856 Memory arrays using nanotube articles with reprogrammable resistance
11/09/2006US20060249587 Portable data storage apparatus
11/09/2006DE102006011905A1 Tragbares digitales Abspielgerät und Betriebsverfahren Portable digital player and operating procedures
11/09/2006DE102006007174A1 Semiconductor memory device, has write data controller writing data received with address to memory cell, where controller stores data in data register, and address controller decoding and storing address in address register
11/09/2006DE102005019568A1 Memory device for use in high frequency module, has synchronization circuit generating and for outputting clock pulse at clock pulse output, where clock pulse is derived from time dependent status input signal and clock input signal
11/08/2006CN2836278Y Music player with negative ion generation function
11/08/2006CN2836166Y Listening device
11/08/2006CN1860553A Random access memory with post-amble data strobe signal noise rejection
11/08/2006CN1860460A Echo clock on memory system having wait information
11/08/2006CN1860425A Device used for the synchronization of clock signals, and clock signal synchronization method
11/08/2006CN1858856A Signal processing circuits and methods, and memory systems
11/08/2006CN1858853A System and its method for regulating address while asynchronous clock domain conversion
11/08/2006CN1858852A Automobile rear-view mirror with music playing module
11/07/2006US7134063 Apparatus and method for testing on-chip ROM
11/07/2006US7134059 Pad connection structure of embedded memory devices and related memory testing method
11/07/2006US7133998 Active memory processing array topography and method
11/07/2006US7133991 Method and system for capturing and bypassing memory transactions in a hub-based memory system
11/07/2006US7133790 Method and system of calibrating the control delay time
11/07/2006US7133324 Synchronous dynamic random access memory devices having dual data rate 1 (DDR1) and DDR2 modes of operation and methods of operating same
11/07/2006US7133323 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
11/07/2006US7133322 Probe storage device
11/07/2006US7133321 Sense amplifier circuit
11/07/2006US7133320 Flood mode implementation for continuous bitline local evaluation circuit
11/07/2006US7133319 Programmable weak write test mode (PWWTM) bias generation having logic high output default mode
11/07/2006US7133318 Output driver capable of controlling slew rate of output signal according to operating frequency information or CAS latency information
11/07/2006US7133312 Readout circuit for semiconductor memory device based on a number of pulses generated by a voltage-controlled oscillator
11/07/2006US7133311 Low power, high speed read method for a multi-level cell DRAM
11/07/2006US7132842 Semiconductor device, driving method and inspection method thereof
11/07/2006US7132720 Semiconductor device having guard ring and manufacturing method thereof
11/02/2006US20060248415 Memory device having conditioning output data
11/02/2006US20060248368 Fast data access mode in a memory device
11/02/2006US20060248347 Virtual smart card system and method
11/02/2006US20060248293 Asynchronously-accessible memory devices and access methods
11/02/2006US20060248258 Compensating a long read time of a memory device in data comparison and write operations
11/02/2006US20060245307 Recording medium, data reproducing device, data recording device, and data reproducing method
11/02/2006US20060245288 Self-refresh circuit with optimized power consumption
11/02/2006US20060245287 Methods and apparatus for implementing standby mode in a random access memory
11/02/2006US20060245286 Circuit for generating a centered reference voltage for a 1t/1c ferroelectric memory
11/02/2006US20060245285 Method for detecting the completion of an operation for writing a data bit into a memory cell and corresponding memory circuit
11/02/2006US20060245284 Semiconductor memory device
11/02/2006US20060245283 Sense amplifier for eliminating leakage current due to bit line shorts
11/02/2006US20060245282 Sense amplifier circuit
11/02/2006US20060245281 Memory controller and data processing system
11/02/2006US20060245280 Integrated circuit having a non-volatile memory cell transistor as a fuse device
11/02/2006US20060245278 Semiconductor memory device
11/02/2006US20060245277 Semiconductor memory device
11/02/2006US20060245276 Signal processing circuits and methods, and memory systems
11/02/2006US20060245275 Chip enable control circuit, memory control circuit, and data processing system
11/02/2006US20060245274 Apparatus and method for controlling NAND flash memory
11/02/2006US20060245272 Method of comparison between cache and data register for non-volatile memory
11/02/2006US20060245271 Device for distributing input data for memory device
11/02/2006US20060245270 Random cache read
11/02/2006US20060245269 Method and circuit for simultaneously programming memory cells
11/02/2006US20060245268 Method and apparatus for assisting system configuration activities
11/02/2006US20060245267 Configuration of memory device
11/02/2006US20060245266 Semiconductor device
11/02/2006US20060245265 Memory control system
11/02/2006US20060245264 Computing with both lock-step and free-step processor modes
11/02/2006US20060245239 Semiconductor integrated circuit
11/02/2006US20060244511 Static, low-voltage fuse-based cell with high-voltage programming
11/02/2006US20060244315 Battery pack with built in communication port
11/02/2006US20060244108 Capacitive techniques to reduce noise in high speed interconnections
11/02/2006EP1717818A1 Semiconductor storage device and redundancy method for semiconductor storage device
11/02/2006EP1717814A1 Semiconductor storage device and semiconductor storage device control method
11/02/2006EP1717813A2 Dual loop sensing scheme for resistive memory elements
11/02/2006EP1614076B1 Multipurpose, re-recordable audio message delivery system
11/02/2006EP1516341B1 Self-calibrating sense amplifier strobe
11/02/2006DE102006020501A1 Verfahren zum Erzeugen eines internen Taktes und Halbleiterspeicherbauelement A method for generating an internal clock and the semiconductor memory device
11/02/2006DE102005019041A1 Clock signal and strobe signal phase relationship adjusting method, for memory system, involves transmitting write data signal synchronized to strobe signal, and adjusting phase misalignment between transmitted clock and strobe signals
11/02/2006DE10003812B4 Schaltung zum Ansteuern eines nichtflüchtigen ferroelektrischen Speichers Circuit for driving a non-volatile ferroelectric memory
11/01/2006CN2833798Y 香水mp3播放器 Perfume mp3 player
11/01/2006CN2833663Y MP3 player with beating function
11/01/2006CN1856835A Synchronous RAM memory circuit
11/01/2006CN1856092A Content playback system, content playback apparatus, and content playback method
11/01/2006CN1855308A Memory device having a virtual ground array and methods using program algorithm to improve read margin loss
11/01/2006CN1855300A Redundancy circuit in semiconductor memory device
11/01/2006CN1855297A Nonvolatile ferroelectric memory device including failed cell correcting circuit
11/01/2006CN1855296A Mram arrays and methods for writing and reading magnetic memory devices