Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
01/2007
01/04/2007US20070002634 System and method of transmitting data in an electronic circuit
01/04/2007DE102005036559B3 Input clock signal synchronizing device, for dynamic RAM, has control devices regulating time delays of clock signals based on phase determined by respective phase comparison devices
01/04/2007DE102005030372A1 Vorrichtung und Verfahren zur Regelung der Schwellspannung eines Transistors, insbesondere eines Transistors eines Leseverstärkers eines Halbleiter- Speicherbauelements Apparatus and method for controlling the threshold voltage of a transistor, in particular a transistor of a sense amplifier of a semiconductor memory device
01/04/2007DE102005030140A1 Multi-Kontext-Speicherzelle Multi-context memory cell
01/04/2007DE102004049252B4 Temperaturabtastschaltung und Periodensteuerschaltung Temperaturabtastschaltung and period control circuit
01/04/2007DE10130732B4 Signalübertragungsschaltung, Datenpufferschaltung und Signalübertragungsverfahren Signal transmission circuit, the data buffer circuit, and signal transmission method
01/03/2007EP1739945A1 Monitoring and control of an image forming apparatus by an operation terminal
01/03/2007EP1739750A2 Semiconductor device and writing method for semiconductor device
01/03/2007EP1739682A1 Voltage supply circuit and semiconductor memory
01/03/2007EP1739565A1 Storage system using flash memory
01/03/2007EP1738373A1 Addressing data within dynamic random access memory
01/03/2007EP1738372A1 Memory with single and dual mode access
01/03/2007EP1738371A1 Collision detection in a multi-port memory system
01/03/2007CN2854700Y Radio filmslide player based on embedded system
01/03/2007CN1890754A Fixed phase clock and strobe signals in daisy chained chips
01/03/2007CN1890753A Method and apparatus for multiple row caches per bank
01/03/2007CN1890752A AC sensing for a resistive memory
01/03/2007CN1890650A Method and apparatus for sending data from multiple sources over a communications bus
01/03/2007CN1889174A Speech coding sound reading S and acoustical pick-up
01/03/2007CN1293568C Readout amplifier
01/03/2007CN1293460C Controller and method for writing data
01/02/2007US7159244 Audio data playback management system and method with editing apparatus and recording medium
01/02/2007US7159156 Memory chip with test logic taking into consideration the address of a redundant word line and method for testing a memory chip
01/02/2007US7159145 Built-in self test system and method
01/02/2007US7159069 Simultaneous external read operation during internal programming in a flash memory device
01/02/2007US7159046 Method and apparatus for configuring communication between devices in a computer system
01/02/2007US7158444 Semiconductor memory device
01/02/2007US7158441 Semiconductor integrated circuit
01/02/2007US7158439 Memory and driving method of the same
01/02/2007US7158438 Network packet buffer allocation optimization in memory bank systems
01/02/2007US7158436 Semiconductor memory devices
01/02/2007US7158435 Fuse circuit and semiconductor integrated circuit device
01/02/2007US7158434 Self-refresh circuit with optimized power consumption
01/02/2007US7158433 Semiconductor storage device and method of controlling refreshing of semiconductor storage device
01/02/2007US7158432 Memory with robust data sensing and method for sensing data
01/02/2007US7158431 Single transistor sensing and double transistor sensing for flash memory
01/02/2007US7158430 Bit line sense amplifier control circuit
01/02/2007US7158429 System for read path acceleration
01/02/2007US7158428 Semiconductor memory device having hierarchical bit line structure
01/02/2007US7158427 Semiconductor memory device
01/02/2007US7158426 Method for testing an integrated semiconductor memory
01/02/2007US7158425 System and method for providing a redundant memory array in a semiconductor memory integrated circuit
01/02/2007US7158424 Semiconductor memory device
01/02/2007US7158422 System and method for communicating information to a memory device using a reconfigured device pin
01/02/2007US7158421 Use of data latches in multi-phase programming of non-volatile memories
01/02/2007US7158419 Methods of fabricating flash memory devices including multiple dummy cell array regions
01/02/2007US7158414 Reference sensing circuit
01/02/2007US7158413 Semiconductor memory device with MOS transistors, each including a floating gate and a control gate, a control method thereof, and a memory card including the same
01/02/2007US7158409 Segmented metal bitlines
01/02/2007US7158402 Asymmetric static random access memory device having reduced bit line leakage
01/02/2007US7158129 Input device and input and output device
01/02/2007US7157940 System and methods for a high-speed dynamic data bus
01/02/2007CA2481583C Memory storage device with heating element
12/2006
12/28/2006WO2006138742A1 Architecture for virtual ground memory arrays
12/28/2006WO2006138150A2 Methods and apparatus for reading a full-swing memory array
12/28/2006US20060294585 System and method for creating and managing a trusted constellation of personal digital devices
12/28/2006US20060294322 Multi-port memory based on DRAM core
12/28/2006US20060294306 Folding USB flash memory device for providing memory storage capacity
12/28/2006US20060291318 Internal Voltage Supply Circuit
12/28/2006US20060291314 Memory
12/28/2006US20060291313 Local sense amplifier and semiconductor memory device having the same
12/28/2006US20060291312 CMOS amplifiers with frequency compensating capacitors
12/28/2006US20060291311 Memory device for retaining data during power-down mode and method of operating the same
12/28/2006US20060291310 Block word line precharge circuit of flash memory device
12/28/2006US20060291309 Driver circuit, electro-optical device, electronic instrument, and drive method
12/28/2006US20060291306 Semiconductor memory device
12/28/2006US20060291304 Method for enhanced block management
12/28/2006US20060291302 Programmable data strobe enable architecture for DDR memory applications
12/28/2006US20060291301 Memory device and method for operating the memory device
12/28/2006US20060291300 High speed data access memory arrays
12/28/2006US20060291299 Semiconductor Memory Device
12/28/2006US20060291298 Liquid crystal display and driving method thereof
12/28/2006US20060291297 Semiconductor memory
12/28/2006US20060291296 Virtual ground circuit for reducing SRAM standby power
12/28/2006US20060291295 Method, system and program product for configuring a digital system based upon system-level variables
12/28/2006US20060291273 Sram memory cell and associated read and write method
12/28/2006US20060289913 Pattern definition of MRAM device using chemical mechanical polishing
12/28/2006DE19929172B4 Integrierter Speicher Built-in Memory
12/28/2006DE102006025957A1 Interface circuit for use in semiconductor memory chip, has serial input terminal to receive serial stream, and finite impulse response unit inserted into main write signal path between drift compensation FIFO-unit and serializer
12/28/2006DE102006021022A1 Memory module e.g. fully buffered dual inline memory module, for use as e.g. direct memory access, in memory system of computer system, has semiconductor memory units e.g. dynamic random access memory, to store data and having low latency
12/28/2006DE102005025149A1 Einrichtung zur Verwendung beim Auslesen einer Speicherzelle, und Verfahren zum Auslesen einer Speicherzelle Means for use in reading a memory cell and method for reading a memory cell
12/28/2006DE102004022425B4 Integrierte Schaltungsanordnung zur Stabilisierung einer Spannung An integrated circuit device for stabilizing a voltage
12/28/2006CA2610901A1 Methods and apparatus for reading a full-swing memory array
12/27/2006EP1736993A1 Magnetic random access memory array having bit/word lines for shared write select and read operations
12/27/2006EP1735967A2 States encoding in multi-bit flash cells
12/27/2006EP1735794A2 Reconstruction of signal timing in integrated circuits
12/27/2006EP1735711A1 Data communication using fault tolerant error correcting and having reduced ground bounce
12/27/2006EP1405240B1 Multi input memory device reader
12/27/2006CN2851857Y MP3, MP4 player with lighting function
12/27/2006CN1886798A Memory cell array with staggered local inter-connect structure
12/27/2006CN1886797A Memory device having multiple array structure for increased bandwidth
12/27/2006CN1886796A Low-power compiler-programmable memory with fast access timing
12/27/2006CN1292581C Recording device
12/27/2006CN1292439C Data access method of semiconductor memory and semiconductor memory
12/26/2006US7155645 System and method for testing memory while an operating system is active
12/26/2006US7155644 Automatic test entry termination in a memory device
12/26/2006US7155627 Memory system and data transmission method
12/26/2006US7155581 Method and apparatus for an energy efficient operation of multiple processors in a memory
12/26/2006US7155561 Method and system for using dynamic random access memory as cache memory
12/26/2006US7155357 Method and apparatus for detecting an unused state in a semiconductor circuit