Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
03/2007
03/06/2007US7187581 Semiconductor memory device and method of operating same
03/06/2007US7187575 Memory device and its manufacturing method
03/06/2007US7187574 High speed data bus
03/06/2007US7187573 Memory circuit and method of generating the same
03/06/2007US7187572 Early read after write operation memory device, system and method
03/06/2007US7187571 Method and apparatus for CAM with reduced cross-coupling interference
03/06/2007US7187214 Amplifier circuit having constant output swing range and stable delay time
03/01/2007US20070050845 Fortified authentication on multiple computers using collaborative agents
03/01/2007US20070050663 Error correction apparatus for performing consecutive reading of multiple code words
03/01/2007US20070050634 Service authentication system, server, network equipment, and method for service authentication
03/01/2007US20070050633 Information processing apparatus and method of controlling authentication process
03/01/2007US20070047362 Memory control system and memory control circuit
03/01/2007US20070047361 Semiconductor-memory device and bank refresh method
03/01/2007US20070047360 Semiconductor storage device having page copying function
03/01/2007US20070047359 Flash memory device
03/01/2007US20070047358 Sensing margin varying circuit and method thereof
03/01/2007US20070047357 Semiconductor memory device
03/01/2007US20070047356 Wide databus architecture
03/01/2007US20070047355 Method for detecting a leakage current of a semiconductor memory
03/01/2007US20070047354 Semiconductor module
03/01/2007US20070047353 Flash memory device with reduced erase time
03/01/2007US20070047352 Charge pump
03/01/2007US20070047351 High-performance memory and related method
03/01/2007US20070047350 Semiconductor memory devices with open bitline architectures and methods of controlling the bitlines of such semiconductor memory devices
03/01/2007US20070047349 Methods and apparatus for low power SRAM
03/01/2007US20070047347 Semiconductor memory devices and a method thereof
03/01/2007US20070047346 Semiconductor integrated circuit
03/01/2007US20070047340 Synchronous memory device
03/01/2007US20070047339 Memory control device and memory control method thereof
03/01/2007US20070047338 External delayed switch apparatus for cooling fans
03/01/2007US20070047337 Interface circuit and semiconductor device
03/01/2007US20070047336 Semiconductor memory with wordline timing
03/01/2007US20070047330 Non-volatile look-up table for an fpga
03/01/2007US20070047328 Flash memory device with multiple erase voltage levels
03/01/2007DE102006036837A1 Memory e.g. random access memory, managing method for use in e.g. file allocation system, file system, involves translating access unit address into storage unit address, where storage unit size is different as access unit size
03/01/2007DE102006031862A1 Strombegrenzungsschaltung und Halbleiterspeichervorrichtung Current limiting circuit and semiconductor memory device
02/2007
02/28/2007EP1756832A1 Pipelined data relocation and improved chip architectures
02/28/2007EP1673782A4 Mram array with segmented word and bit lines
02/28/2007CN2874971Y Blue tooth MP3 player
02/28/2007CN1922586A Non-volatile memory and method with memory planes alignment
02/28/2007CN1922585A Non-volatile memory and method with non-sequential update block management
02/28/2007CN1922580A Non-volatile memory and method with phased program failure handling
02/28/2007CN1921011A Non-volatile storage and its related limit voltage verification method and semiconductor device
02/28/2007CN1921002A 存储器控制器以及存储器系统 The memory controller and memory system
02/28/2007CN1921001A Method and apparatus for selecting and playing multimedia file playable in embedded device
02/28/2007CN1921000A 半导体装置 Semiconductor device
02/28/2007CN1302551C Semiconductor memory device and readout amplifier part thereof
02/28/2007CN1302481C Semiconductor integrated circuit and storage system thereof
02/28/2007CA2549453A1 Method and apparatus for synchronizing an industrial controller with a redundant controller
02/27/2007US7185244 Semiconductor integrated circuit and electronic system
02/27/2007US7185243 Testing implementation suitable for built-in self-repair (BISR) memories
02/27/2007US7185173 Column address path circuit and method for memory devices having a burst access mode
02/27/2007US7184357 Decoding circuit for memory device
02/27/2007US7184353 Semiconductor device
02/27/2007US7184352 Memory system and method using ECC to achieve low power refresh
02/27/2007US7184351 Semiconductor memory device
02/27/2007US7184350 Method and system for providing independent bank refresh for volatile memories
02/27/2007US7184348 Sensing circuit for a semiconductor memory
02/27/2007US7184347 Semiconductor memory devices having separate read and write global data lines
02/27/2007US7184346 Memory cell sensing with low noise generation
02/27/2007US7184345 High speed and high precision sensing for digital multilevel non-volatile memory system
02/27/2007US7184344 Semiconductor device comprising a differential sense amplifier, a write column selection switch and a read column selection switch
02/27/2007US7184343 Nonvolatile semiconductor memory device providing stable data reading
02/27/2007US7184342 Semiconductor memory device having enhanced sense amplifier
02/27/2007US7184341 Method of data flow control for a high speed memory
02/27/2007US7184338 Semiconductor device, semiconductor device testing method, and programming method
02/27/2007US7184334 Semiconductor memory device and method of testing semiconductor memory device
02/27/2007US7184333 Semiconductor memory having a dummy signal line connected to dummy memory cell
02/27/2007US7184332 Memory circuit and method for processing a code to be loaded into a memory circuit
02/27/2007US7184331 Redundancy fuse control circuit and semiconductor memory device having the same and redundancy process method
02/27/2007US7184329 Alignment of memory read data and clocking
02/27/2007US7184328 DQS for data from a memory array
02/27/2007US7184327 System and method for enhanced mode register definitions
02/27/2007US7184326 Semiconductor memory
02/27/2007US7184325 Input circuit for memory device
02/27/2007US7184324 Semiconductor memory device having a single input terminal to select a buffer and method of testing the same
02/27/2007US7184323 4N pre-fetch memory data transfer system
02/27/2007US7184322 Semiconductor memory device and control method thereof
02/27/2007US7184321 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
02/27/2007US7184301 Magnetic memory cell and magnetic random access memory using the same
02/27/2007US7184293 Crosspoint-type ferroelectric memory
02/27/2007US7184292 High speed data bus
02/27/2007US7183835 Semiconductor device which realizes a short-circuit protection function without shunt resistor, and semiconductor device module
02/27/2007US7183635 Semiconductor device having a low-resistance bus interconnect, method of manufacturing same, and display apparatus employing same
02/27/2007US7183595 Ferroelectric memory
02/22/2007WO2007022382A2 Dram density enhancements
02/22/2007WO2006073891A3 Highly portable media device
02/22/2007WO2006052846A3 Programmable matrix array with chalcogenide material
02/22/2007US20070043922 Memory system for selectively transmitting command and address signals
02/22/2007US20070041260 Semiconductor memory device having dummy sense amplifiers and methods of utilizing the same
02/22/2007US20070041259 DRAM density enhancements
02/22/2007US20070041258 Semiconductor memory device for reducing cell area
02/22/2007US20070041257 Low voltage sensing scheme having reduced active power down standby current
02/22/2007US20070041256 Layout for equalizer and data line sense amplifier employed in a high speed memory device
02/22/2007US20070041255 System and method for injecting phase jitter into integrated circuit test signals
02/22/2007US20070041254 Synchronous semiconductor memory device for reducing power consumption
02/22/2007US20070041253 Methods and systems for generating latch clock used in memory reading
02/22/2007US20070041250 Read port circuit for register file
02/22/2007US20070041245 Set programming methods and write driver circuits for a phase-change memory array
02/22/2007US20070040595 Semiconductor integrated circuit