Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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03/15/2007 | US20070058460 Low power chip select (CS) latency option |
03/15/2007 | US20070058459 Semiconductor memory device with no latch error |
03/15/2007 | US20070058456 Integrated circuit arrangement |
03/15/2007 | US20070058455 Method and program for converting boundary data into cell inner shape data |
03/15/2007 | US20070058454 Input circuit for a memory device, and a memory device and memory system employing the input circuit |
03/15/2007 | US20070058453 Apparatus and Method for Centralized Power Management |
03/15/2007 | US20070058452 Voltage glitch detection circuits and methods thereof |
03/15/2007 | US20070058451 Semiconductor memory device, semiconductor integrated circuit system using the same, and control method of semiconductor memory device |
03/15/2007 | US20070058450 Limited use data storing device |
03/15/2007 | US20070058449 Semiconductor device and method thereof |
03/15/2007 | US20070058448 Bitline variable methods and circuits for evaluating static memory cell dynamic stability |
03/15/2007 | US20070058447 Technique to suppress bitline leakage current |
03/15/2007 | US20070058433 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells |
03/15/2007 | US20070057696 Semiconductor integrated circuits with power reduction mechanism |
03/15/2007 | US20070057691 Output Driver Circuit |
03/15/2007 | DE102006039328A1 Wave-Pipeline-Ausgabeschaltung für synchrones Speicherbauelement Wave-pipelined output circuit for synchronous memory device |
03/15/2007 | DE102006037723A1 Bitleitungsabtastverstärker und zugehöriges Verstärkungsverfahren Bitline sense amplifier and associated amplification method |
03/15/2007 | DE102006036602A1 Halbleiterspeichervorrichtungen mit einer Offen-Bitleitung-Architektur sowie Verfahren zum Steuern der Bitleitungen solcher Halbleiterspeichervorrichtungen Semiconductor memory devices having an open bit line architecture and to methods for controlling the bit lines of such semiconductor memory devices, |
03/15/2007 | DE102006033395A1 Integrated circuit component with erasable EEPROM memory, has first semiconductor-trough region of substrate which is split and electrically coupled by global control line by first and second byte-selection transistor |
03/15/2007 | DE102006029698A1 Synchroner Signalgenerator Synchronous signal generator |
03/15/2007 | DE102006019423A1 Speichersystem und Verfahren für den Zugriff zu Speicherchips eines Speichersystems Memory system and method for accessing memory chips of a memory system |
03/15/2007 | DE102005040109A1 Halbleiterspeichersystem und Halbleiterspeicherchip A semiconductor memory system and the semiconductor memory chip |
03/14/2007 | EP1763036A1 Semiconductor storage device, electronic apparatus, and mode setting method |
03/14/2007 | EP1761932A1 Dram with half and full density operation |
03/14/2007 | EP1687827A4 Embedded memory with security row lock protection |
03/14/2007 | EP1671357A4 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation |
03/14/2007 | CN2879314Y USB mobile memeory |
03/14/2007 | CN1930627A Technique for efficient video re-sampling |
03/14/2007 | CN1930559A Data sampling clock edge placement training for high speed gpu-memory interface |
03/14/2007 | CN1929027A Semiconductor memory device, semiconductor integrated circuit system using the same, and control method of semiconductor memory device |
03/14/2007 | CN1929025A 接口电路 Interface Circuit |
03/14/2007 | CN1929024A Transposition storage circuit for discrete cosine transform |
03/14/2007 | CN1304955C Memory control method and correlation device |
03/13/2007 | US7191339 System and method for using a PLD identification code |
03/13/2007 | US7191302 Memory control device for controlling transmission of data signals |
03/13/2007 | US7191295 Sensing word groups in a memory |
03/13/2007 | US7191279 Schmoo runtime reduction and dynamic calibration based on a DLL lock value |
03/13/2007 | US7190753 Method and apparatus for temporally correcting a data signal |
03/13/2007 | US7190631 Multi-port memory |
03/13/2007 | US7190630 Semiconductor storage device and method of selecting bit line of the semiconductor storage device |
03/13/2007 | US7190628 Semiconductor memory device having self refresh mode and related method of operation |
03/13/2007 | US7190627 Semiconductor device |
03/13/2007 | US7190626 Memory system with bit-line discharging mechanism |
03/13/2007 | US7190625 Method and apparatus for data compression in memory devices |
03/13/2007 | US7190622 Method and architecture to calibrate read operations in synchronous flash memory |
03/13/2007 | US7190621 Sensing scheme for a non-volatile semiconductor memory cell |
03/13/2007 | US7190618 Semiconductor device for reducing coupling noise |
03/13/2007 | US7190615 Semiconductor device |
03/13/2007 | US7190413 Memory video data storage structure optimized for small 2-D data transfer |
03/08/2007 | WO2007028109A2 Methods and apparatus of stacking drams |
03/08/2007 | WO2007028095A2 Method and apparatus for converting parallel data to serial data in high speed applications |
03/08/2007 | WO2007027577A2 Memory with robust data sensing and method for sensing data |
03/08/2007 | WO2006048860A3 Drift compensation in a flash memory |
03/08/2007 | US20070055832 Method and system for fast data access using a memory array |
03/08/2007 | US20070055818 Method and system for using dynamic random access memory as cache memory |
03/08/2007 | US20070055796 Memory device having terminals for transferring multiple types of data |
03/08/2007 | US20070055792 Memory device having terminals for transferring multiple types of data |
03/08/2007 | US20070053235 Semiconductor memory device |
03/08/2007 | US20070053234 Semiconductor memory device |
03/08/2007 | US20070053233 Method for checking the block erasing of a memory |
03/08/2007 | US20070053232 Bitline precharge voltage generator |
03/08/2007 | US20070053231 Flood Mode Implementation for Continuous Bitline Local Evaluation Circuit |
03/08/2007 | US20070053229 Redundancy substitution method, semiconductor memory device and information processing apparatus |
03/08/2007 | US20070052450 Current feedback amplifiers |
03/08/2007 | DE10027970B4 Verfahren zur Dekodierung von digitalen Audiodaten und Vorrichtung zur Dekodierung von digitalen Audiodaten Method for decoding digital audio data and apparatus for decoding digital audio data |
03/07/2007 | EP1760723A2 Shared memory device |
03/07/2007 | EP1428225B1 Concept for reliable data transmission between electronic modules |
03/07/2007 | CN2876990Y Chip writing-in aid |
03/07/2007 | CN2876989Y Portable storage medium with high security |
03/07/2007 | CN2876986Y Blue tooth wireless memory |
03/07/2007 | CN1926636A IC with non-volatile memory and its write protection method |
03/07/2007 | CN1926633A Semiconductor memory and method for operating same |
03/07/2007 | CN1926526A Data communication using fault tolerant error correcting and having reduced ground bounce |
03/07/2007 | CN1925056A Portable record and/or reproduce device, method of reproducing, and method of recording and reproducing |
03/07/2007 | CN1924827A Portable media player with electricity saving function |
03/07/2007 | CN1303692C Semiconductor memory device, method for fabricating the same, and method for driving the same |
03/07/2007 | CN1303661C Precharge apparatus in semiconductor memory device and precharge method using the same |
03/07/2007 | CN1303611C Thin film magnetic memory device suppressing internal magnetic noises |
03/07/2007 | CN1303610C Method and appts. for synchronzation of row and column access operation |
03/06/2007 | US7188219 Buffer control system and method for a memory system having outstanding read and write request buffers |
03/06/2007 | US7187618 Circuit of SDRAM and method for data communication |
03/06/2007 | US7187611 Method of using an e-fuse device |
03/06/2007 | US7187610 Flash/dynamic random access memory field programmable gate array |
03/06/2007 | US7187609 Self refresh circuit of PSRAM for real access time measurement and operating method for the same |
03/06/2007 | US7187608 System and method for controlling the access and refresh of a memory |
03/06/2007 | US7187607 Semiconductor memory device and method for manufacturing same |
03/06/2007 | US7187606 Read port circuit for register file |
03/06/2007 | US7187605 Semiconductor storage device |
03/06/2007 | US7187603 Semiconductor memory device, repair search method, and self-repair method |
03/06/2007 | US7187601 Active termination circuit and method for controlling the impedance of external integrated circuit terminals |
03/06/2007 | US7187600 Method and apparatus for protecting an integrated circuit from erroneous operation |
03/06/2007 | US7187599 Integrated circuit chip having a first delay circuit trimmed via a second delay circuit |
03/06/2007 | US7187598 Device having an interface and method thereof |
03/06/2007 | US7187597 Integrated circuit with circuitry for overriding a defective configuration memory cell |
03/06/2007 | US7187596 Semiconductor system having a source potential supply section |
03/06/2007 | US7187594 Semiconductor storage device, semiconductor device, manufacturing method of semiconductor storage device, and mobile electronic device |
03/06/2007 | US7187593 Control system; control apparatus; storage device and computer program product |
03/06/2007 | US7187592 Multi-state memory |
03/06/2007 | US7187585 Read operation for non-volatile storage that includes compensation for coupling |
03/06/2007 | US7187582 Erroneous operation preventing circuit of non-volatile memory device |