Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
06/2007
06/14/2007DE102006037264A1 Halbleiterspeicheranordnung mit verzweigtem Steuer- und Adressbus A semiconductor memory device having a branched control and address
06/14/2007DE102005058438A1 Integrierter Halbleiterspeicher mit Ermittelung einer Chiptemperatur Integrated semiconductor memory with a chip temperature determination
06/14/2007DE102005031643B4 DRAM-Speicher DRAM memory
06/13/2007EP1796014A2 System and method for converting analog signals to digital signals with rights management protection
06/13/2007EP1794757A1 Reading of the state of a non-volatile memory element
06/13/2007CN2911791Y Multi-channel flashmemory transmission controller, chips and memory device
06/13/2007CN2909920Y Hair topknot with MP3
06/13/2007CN1979679A Semiconductor device with adaptive power control function
06/13/2007CN1979463A Sound-controlled multi-media player
06/13/2007CN1979462A Sound-controlled multi-media player
06/12/2007US7231620 Apparatus, generator, and method for clock tree synthesis
06/12/2007US7231537 Fast data access mode in a memory device
06/12/2007US7231472 Input/output byte control device using nonvolatile ferroelectric register
06/12/2007US7230875 Delay locked loop for use in synchronous dynamic random access memory
06/12/2007US7230872 Efficent column redundancy techniques
06/12/2007US7230870 Semiconductor memory device and test method therefor
06/12/2007US7230869 Method and apparatus for accessing contents of memory cells
06/12/2007US7230868 Stable source-coupled sense amplifier
06/12/2007US7230867 Semiconductor device
06/12/2007US7230866 Integrated circuit devices having precharge and equalization circuits therein and methods of operating same
06/12/2007US7230865 Input/output line sharing apparatus of semiconductor memory device
06/12/2007US7230864 Circuit for generating data strobe signal of semiconductor memory device
06/12/2007US7230863 High access speed flash controller
06/12/2007US7230862 Semiconductor memory devices and methods of delaying data sampling signal
06/12/2007US7230859 Nonvolatile memory
06/12/2007US7230858 Dual frequency first-in-first-out structure
06/12/2007US7230857 Methods of modifying operational characteristic of memory devices using control bits received through data pins and related devices and systems
06/12/2007US7230856 High-speed multiplexer latch
06/12/2007US7230854 Method for programming non-volatile memory with self-adjusting maximum program loop
06/12/2007US7230852 Non-volatile semiconductor memory device allowing efficient programming operation and erasing operation in short period of time
06/12/2007US7230804 Method and apparatus for providing a magnetic tunnel transistor with a self-pinned emitter
06/12/2007US7230475 Semiconductor devices including an external power voltage control function and methods of operating the same
06/12/2007US7230462 Clock signal synchronizing device, and clock signal synchronizing method
06/12/2007US7230448 On-DRAM termination resistance control circuit and method thereof
06/12/2007US7230294 Non-volatile memory devices having a multi-layered charge storage layer and methods of forming the same
06/07/2007WO2007036048B1 Daisy chain cascading devices
06/07/2007WO2006036413A3 System and method for storing data
06/07/2007US20070130439 Secure digital certificate storing scheme for flash memory and electronic apparatus
06/07/2007US20070127302 Nonvolatile semiconductor memory
06/07/2007US20070127301 Semiconductor memory device
06/07/2007US20070127300 Bun-in test method semiconductor memory device
06/07/2007US20070127297 Semiconductor integrated circuit device and data processor device
06/07/2007US20070127296 Data input circuit of semiconductor memory device and data input method thereof
06/07/2007US20070127282 High speed data bus
06/07/2007US20070126397 Battery pack with built in communication port
06/06/2007EP1377981B1 Method and system to optimize test cost and disable defects for scan and bist memories
06/06/2007EP1214713B1 Architecture, method(s) and circuitry for low power memories
06/06/2007DE19650715B4 Unterwortleitungstreiberschaltung und diese verwendende Halbleiterspeichervorrichtung Sub-word line driver circuit, and this semiconductor memory device used
06/06/2007DE102006049909A1 ZQ-Eichergebnis rückkoppelnde DLL-Schaltung und dieselbe enthaltende Halbleitervorrichtung ZQ calibration result rückkoppelnde DLL circuit and semiconductor device containing the same
06/06/2007DE102005057788A1 Dynamic random access memory circuit for lower operating voltages, includes memory cell, bit line pair, selection transistor, read-out amplifier and controller
06/06/2007DE102005056278A1 Flip-Flop-Vorrichtung und Verfahren zum Speichern und Ausgeben eines Datenwerts Flip-flop device and method for storing and outputting a data value
06/06/2007DE102004026808B4 Abwärtskompatibler Speicherbaustein Compatible memory module downward
06/06/2007DE10144245B4 Halbleiterspeicherbauelement mit Bitleitungen und einem Abtastverstärker The semiconductor memory device with bit lines and a sense amplifier
06/06/2007CN2909457Y Solid recording audio amplifier based on MP3 technology
06/06/2007CN1977336A System and method for improving performance in computer memory systems supporting multiple memory access latencies
06/06/2007CN1975924A Clocked standby mode with maximum clock frequency
06/06/2007CN1975921A Circuit arrangement for generating an n-bit output pointer, semiconductor memory and method
06/06/2007CN1975920A Method, system and memory controller capable of handling precharge-to-precharge restrictions
06/06/2007CN1975860A Method for high frequency reconstruction and apparatus thereof
06/06/2007CN1975634A Adaptive throttling of memory accesses, such as throttling RDRAM accesses in a real-time system
06/05/2007US7227918 Clock data recovery circuitry associated with programmable logic device circuitry
06/05/2007US7227829 Mechanical data processing
06/05/2007US7227808 Semiconductor memory device which compensates for delay time variations of multi-bit data
06/05/2007US7227803 Apparatus for reducing data corruption in a non-volatile memory
06/05/2007US7227801 Semiconductor memory device with reliable fuse circuit
06/05/2007US7227800 Noise suppression in memory device sensing
06/05/2007US7227799 Sense amplifier for eliminating leakage current due to bit line shorts
06/05/2007US7227798 Latch-type sense amplifier
06/05/2007US7227797 Hierarchical memory correction system and method
06/05/2007US7227795 Data output circuit, data output method, and semiconductor memory device
06/05/2007US7227794 Internal voltage generation control circuit and internal voltage generation circuit using the same
06/05/2007US7227793 Voltage translator for multiple voltage operations
06/05/2007US7227792 Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same
06/05/2007US7227791 Semiconductor memory device including circuit to store access data
06/05/2007US7227790 NOR flash memory device with a serial sensing operation and method of sensing data bits in a NOR flash memory device
06/05/2007US7227789 Method and apparatus for filtering output data
06/05/2007US7227785 Memory devices with page buffer having dual registers and method of using the same
06/05/2007US7227777 Mode selection in a flash memory device
06/05/2007US7227774 MRAM integrated circuits, MRAM circuits, and systems for testing MRAM integrated circuits
06/05/2007US7227773 Magnetic element utilizing spin-transfer and half-metals and an MRAM device using the magnetic element
06/05/2007US7227593 Apparatus for preventing auto-convergence error in projection television receiver
06/05/2007US7227396 Clock signal input/output device for correcting clock signals
06/05/2007US7227381 Input buffer and semiconductor device including the same
05/2007
05/31/2007WO2007062424A2 Data storage device with hard drive and interchangeable data storage disks
05/31/2007WO2007061482A2 Memory interface to bridge memory buses
05/31/2007WO2007061467A2 Memory interface to bridge memory buses
05/31/2007WO2006007264A3 Simultaneous external read operation during internal programming in a flash memory device
05/31/2007WO2005067664A3 Low profile removable memory module
05/31/2007WO2005040961A3 Method and configuration for connecting test structures or line arrays for monitoring integrated circuit manufacturing
05/31/2007US20070124601 Methods, systems, and computer program products for entering sensitive and padding data using user-defined criteria
05/31/2007US20070124599 Authentication apparatus and method for use in vehicle
05/31/2007US20070121414 Shielded bitline architecture for dynamic random access memory (dram) arrays
05/31/2007US20070121410 Semiconductor memory
05/31/2007US20070121409 Method and System for Providing Independent Bank Refresh for Volatile Memories
05/31/2007US20070121408 Stable temperature adjustment for referesh control
05/31/2007US20070121407 Self-refresh period measurement circuit of semiconductor device
05/31/2007US20070121406 Semiconductor integrated circuit having low power consumption with self-refresh
05/31/2007US20070121405 Semiconductor memory device
05/31/2007US20070121404 Temperature sensing circuit, voltage generation circuit, and semiconductor storage device
05/31/2007US20070121403 Apparatus and method for controlling operation of data buses of memory device