Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
05/2007
05/23/2007CN1967712A Multifunctional flash disk
05/23/2007CN1967711A Low power consumption high speed transceiver
05/23/2007CN1967710A 半导体存储装置 The semiconductor memory device
05/23/2007CN1967708A Memory interface to bridge memory buses
05/23/2007CN1967520A Random playing system and method
05/23/2007CN1317764C Semiconductor IC device and design method thereof
05/23/2007CN1317643C Storage device, method for accessing storage device and Read-solomon decoder
05/22/2007US7222319 Timing analysis method and apparatus
05/22/2007US7222273 Apparatus and method for testing semiconductor memory devices, capable of selectively changing frequencies of test pattern signals
05/22/2007US7222225 Programmable processor and method for matched aligned and unaligned storage instructions
05/22/2007US7222224 System and method for improving performance in computer memory systems supporting multiple memory access latencies
05/22/2007US7222210 System and method for memory hub-based expansion bus
05/22/2007US7221618 Semiconductor memory device having different synchronizing timings depending on the value of CAS latency
05/22/2007US7221617 Backwards-compatible memory module
05/22/2007US7221615 Semiconductor memory chip
05/22/2007US7221613 Memory with serial input/output terminals for address and data and method therefor
05/22/2007US7221612 SDRAM address mapping optimized for two-dimensional access
05/22/2007US7221611 Semiconductor memory device for low power consumption
05/22/2007US7221609 Fine granularity DRAM refresh
05/22/2007US7221608 Single NMOS device memory cell and array
05/22/2007US7221607 Multi-port memory systems and methods for bit line coupling
05/22/2007US7221606 Semiconductor memory device for low power system comprising sense amplifier with operating voltages lower/higher than ground/voltage supply and auxiliary sense amplifier
05/22/2007US7221605 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
05/22/2007US7221604 Memory structure with repairing function and repairing method thereof
05/22/2007US7221603 Defective block handling in a flash memory device
05/22/2007US7221602 Memory system comprising a semiconductor memory
05/22/2007US7221601 Timer lockout circuit for synchronous applications
05/22/2007US7221599 Polymer memory cell operation
05/22/2007US7221596 pFET nonvolatile memory
05/22/2007US7221595 Semiconductor device and method of generating sense signal
05/22/2007US7221594 Semiconductor device and method for writing data into semiconductor device
05/22/2007US7221586 Memory utilizing oxide nanolaminates
05/22/2007US7221581 Memory with storage cells biased in groups
05/22/2007US7221576 Dynamic RAM-and semiconductor device
05/22/2007US7221575 Pseudo ternary content addressable memory device having row redundancy and method therefor
05/22/2007US7221574 Semiconductor storage device
05/22/2007US7221573 Voltage up converter
05/17/2007US20070113117 Hybrid parallel/serial bus interface
05/17/2007US20070113002 Scratch control memory array in a flash memory device
05/17/2007US20070112450 Portable sound reproducing system and method
05/17/2007US20070112449 Portable sound reproducing system and method
05/17/2007US20070112448 Portable sound reproducing system and method
05/17/2007US20070109898 Semiconductor device
05/17/2007US20070109897 Semiconductor memory device
05/17/2007US20070109896 Data storage device and refreshing method for use with such device
05/17/2007US20070109895 Semiconductor memory device and method for reading semiconductor memory device
05/17/2007US20070109894 Systems and methods for reading and writing a magnetic memory device
05/17/2007US20070109893 SRAM Circuitry
05/17/2007US20070109892 Memory device and method of operating the same
05/17/2007US20070109891 Semiconductor memory device and method for driving semiconductor memory device
05/17/2007US20070109890 Memory, processing system and methods for use therewith
05/17/2007US20070109889 Non-Volatile Memory and Method With Reduced Source Line Bias Errors
05/17/2007US20070109886 Block redundancy implementation in heirarchical ram's
05/17/2007US20070109880 Digital I/O timing control
05/17/2007US20070109879 Physical quantity detecting device and imaging apparatus
05/17/2007US20070109878 Memory device with improved writing capabilities
05/17/2007US20070109877 Regulating voltages in semiconductor devices
05/17/2007US20070109875 Data storage method and information processing device using the same
05/17/2007US20070109874 Time-lapse cell cycle analysis of unstained nuclei
05/17/2007US20070109873 Non-volatile memory device having controlled bulk voltage and method of programming same
05/17/2007US20070109847 Non-Volatile Memory and Method With Improved Sensing
05/17/2007US20070108482 Non-volatile electromechanical field effect devices and circuits using same and methods of forming same
05/16/2007EP1785843A2 Access method and access circuit for flash memory in embedded system
05/16/2007EP1784835A1 Individual data line strobe-offset control in memory systems
05/16/2007EP1784834A1 Register file apparatus and method incorporating read-after-write blocking using detection cells
05/16/2007EP1784833A2 Memory system and method for strobing data, command and address signals
05/16/2007CN1963945A Semiconductor memory device and method for driving semiconductor memory device
05/16/2007CN1963944A Storage apparatus capable of realizing dual-ported storage and method thereof
05/16/2007CN1963943A Method for playing music
05/16/2007CN1963803A Storage apparatus for play medium
05/15/2007US7219274 Memory module and method of testing the same
05/15/2007US7219272 Semiconductor integrated circuit with memory redundancy circuit
05/15/2007US7219205 Memory controller device
05/15/2007US7219200 Method of accessing matrix data with address translation circuit that enables quick serial access in row or column directions
05/15/2007US7219184 Method and apparatus for longest prefix matching in processing a forwarding information database
05/15/2007US7219026 Frequency measuring circuits including charge pumps and related memory devices and methods
05/15/2007US7218569 Memory circuit, and method for reading out data contained in the memory circuit using shared command signals
05/15/2007US7218566 Power management of memory via wake/sleep cycles
05/15/2007US7218565 Method and apparatus for independently refreshing memory capacitors
05/15/2007US7218564 Dual equalization devices for long data line pairs
05/15/2007US7218563 Method and apparatus for reading data from nonvolatile memory
05/15/2007US7218562 Recovering bit lines in a memory array after stopped clock operation
05/15/2007US7218561 Apparatus and method for semiconductor device repair with reduced number of programmable elements
05/15/2007US7218560 Semiconductor memory device
05/15/2007US7218558 Semiconductor memory devices having column redundancy circuits therein that support multiple memory blocks
05/15/2007US7218546 Integrated circuit device provided with series-connected TC parallel unit ferroelectric memory and method for testing the same
05/15/2007US7218542 Physical priority encoder
05/15/2007US7218159 Flip-flop circuit having majority-logic circuit
05/10/2007WO2007052103A1 Apparatus, method and computer program product providing synchronization of memory card operation during dvb-h reception
05/10/2007WO2007051764A1 System and method for capacitive mis-match bit-line sensing
05/10/2007WO2005023356A3 Method and apparatus for data storage and retrieval
05/10/2007US20070104018 Apparatus and method for improving dynamic refresh in a memory device
05/10/2007US20070104009 Flash/dynamic random access memory field programmable gate array
05/10/2007US20070104008 Bit-line sense amplifier driver
05/10/2007US20070104007 Data distribution processing system, data distribution processing method, and program
05/10/2007US20070104006 Memory core and method thereof
05/10/2007US20070104005 Method and apparatus for reducing standby current in a dynamic random access memory during self refresh
05/10/2007US20070104004 Multi-Bit-Per-Cell Flash EEprom Memory with Refresh
05/10/2007US20070104003 Memory device with auxiliary sensing
05/10/2007US20070104002 Semiconductor memory device with MOS transistors each having floating gate and control gate and method of controlling the same