Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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06/26/2007 | US7236414 Local sense amplifier in memory device |
06/26/2007 | US7236413 Semiconductor memory device |
06/26/2007 | US7236412 Integrated semiconductor memory with redundant memory cells replaceable for either true or complementary defective memory cells |
06/26/2007 | US7236411 Programmable memory access parameters |
06/26/2007 | US7236410 Memory cell driver circuits |
06/26/2007 | US7236409 Semiconductor memory device provided with constant-current circuit having current trimming function |
06/26/2007 | US7236407 Flash memory architecture for optimizing performance of memory having multi-level memory cells |
06/26/2007 | US7236403 Precharge arrangement for read access for integrated nonvolatile memories |
06/26/2007 | US7236397 Redundancy circuit for NAND flash memory device |
06/26/2007 | US7236386 System and method for transferring data to and from a magnetic shift register with a shiftable data column |
06/26/2007 | US7236012 Data output driver that controls slew rate of output signal according to bit organization |
06/26/2007 | CA2428982C Boundary addressable memory |
06/26/2007 | CA2338634C A semiconductor memory card, playback apparatus, recording apparatus, playback method, recording method, and computer-readable recording medium |
06/26/2007 | CA2256222C Content addressable memory fifo with and without purging |
06/21/2007 | WO2007002509A3 Word line driver for dram embedded in a logic process |
06/21/2007 | WO2006047705A3 Auto purge of serial use devices |
06/21/2007 | WO2005008893A8 Semiconductor integrated circuit |
06/21/2007 | US20070143839 Access Unit Switching Through Physical Mediation |
06/21/2007 | US20070143625 Voice-capable system and method for providing input options for authentication |
06/21/2007 | US20070143601 System and method for authorizing information flows |
06/21/2007 | US20070140036 Semiconductor memory device |
06/21/2007 | US20070140035 Apparatus and Method for Pipelined Memory Operations |
06/21/2007 | US20070140032 Sensing Current Recycling Method During Self-Refresh |
06/21/2007 | US20070140029 Resistive memory devices including selected reference memory cells |
06/21/2007 | US20070140028 Input buffer for low voltage operation |
06/21/2007 | US20070140027 Precharge circuit and method employing inactive weak precharging and equalizing scheme and memory device including the same |
06/21/2007 | US20070140026 Precharge circuit and method employing inactive weak precharging and equalizing scheme and memory device including the same |
06/21/2007 | US20070140025 Method and apparatus for testing a fully buffered memory module |
06/21/2007 | US20070140023 Integrated dynamic random access memory chip |
06/21/2007 | US20070140022 System and method for enhanced mode register definitions |
06/21/2007 | US20070140021 Semiconductor integrated circuit and data output method |
06/21/2007 | US20070140020 Parallel data storage system |
06/21/2007 | US20070140004 Sensing scheme for low-voltage flash memory |
06/21/2007 | US20070139084 Amplifier circuit having constant output swing range and stable delay time |
06/21/2007 | DE4332583B4 Schaltung zum Klemmen eines Freigabetaktsignales für eine Halbleiterspeichervorrichtung Circuit for clamping an enable clock signal for a semiconductor memory device |
06/21/2007 | DE29825213U1 Vorrichtung zum Zeitverzögerungsausgleich von Einrichtungen Apparatus for time delay compensation of facilities |
06/21/2007 | DE19723449B4 Verfahren zum Lesen und Schreiben von Dateninhalten eines dynamischen Halbleiterspeichers A method of reading and writing of data contents of a dynamic semiconductor memory |
06/21/2007 | DE102007008157A1 Data transmission method for use between data processing device e.g. central processing unit, memory modules and image processing module, involves sending data packets from modules to devices and vice versa via data lines of interface |
06/21/2007 | DE102006054998A1 Latenzsteuerschaltung, automatische Vorladesteuerschaltung, Halbleiterspeicherbauelement, Verfahren zum Steuern der Latenz und Verfahren zum Steuern eines Vorladevorgangs Latency control circuit, automatic precharge control circuit, semiconductor memory device, method for controlling the latency and method for controlling a precharging |
06/21/2007 | DE102006051284A1 Duty cycle correction circuit for use in clock generation circuit, has shared charge pump receiving internal clock signals and outputting control signal based on clock signals, where charge pump compensates duty cycle errors |
06/21/2007 | DE102006050103A1 ZQ-Eichschaltung und Halbleitervorrichtung ZQ calibration circuit and semiconductor device |
06/21/2007 | DE10105627B4 Mehrfachanschlussspeichereinrichtung, Verfahren und System zum Betrieb einer Mehrfachanschlussspeichereinrichtung Multi-port memory device, method and system for operating a multi-port memory device |
06/20/2007 | EP1798731A2 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied |
06/20/2007 | EP1797564A1 Read method and sensing device |
06/20/2007 | CN2914256Y Quick-positioning electronic device for leaving messages |
06/20/2007 | CN1985329A Memory access using multiple activated memory cell rows |
06/20/2007 | CN1983619A 数据读/写装置 Data read / write device |
06/20/2007 | CN1983618A Unipolar resistance random access memory device and vertically stacked architecture |
06/20/2007 | CN1983446A Memory controller and its controlling method |
06/20/2007 | CN1983440A Input circuit for use in memory device, storing device and storing system using the same |
06/20/2007 | CN1983439A Method for increasing RAM read-writing efficiency |
06/20/2007 | CN1983386A Sound system |
06/20/2007 | CN1983349A Electronic reader with connected-disconnected speech player and the speech player |
06/20/2007 | CN1983214A Portable storage device with wireless identifying function |
06/20/2007 | CN1322760C Device for preventing automatic convergent error for use in projective tv receiver |
06/20/2007 | CN1322513C Dynamic semiconductor memory and semiconductor IC device |
06/20/2007 | CN1322442C Data transfer apparatus for serial data transfer in system LSI |
06/20/2007 | CN1322441C Multi-chip package type memory system |
06/20/2007 | CN1322438C Flash memory system and method |
06/20/2007 | CN1322428C Flash storage management method |
06/19/2007 | US7234034 Self-clocking memory device |
06/19/2007 | US7233541 Storage device |
06/19/2007 | US7233538 Variable memory refresh rate for DRAM |
06/19/2007 | US7233537 Thin film magnetic memory device provided with a dummy cell for data read reference |
06/19/2007 | US7233536 Semiconductor memory device having memory cells to store cell data and reference data |
06/19/2007 | US7233535 Semiconductor memory device |
06/19/2007 | US7233534 Electronic circuit package |
06/19/2007 | US7233533 Method for controlling data output timing of memory device and device therefor |
06/19/2007 | US7233532 Reconfiguration port for dynamic reconfiguration-system monitor interface |
06/19/2007 | US7233531 SRAM cell with horizontal merged devices |
06/19/2007 | US7233173 System and method for providing a low jitter data receiver for serial links with a regulated single ended phase interpolator |
06/19/2007 | US7233172 Differential amplifier circuit capable of accurately amplifying even high-speeded signal of small amplitude |
06/19/2007 | US7233169 Bidirectional register segmented data busing |
06/19/2007 | US7233024 Three-dimensional memory device incorporating segmented bit line memory array |
06/19/2007 | US7232696 Semiconductor integrated circuit and method for detecting soft defects in static memory cell |
06/14/2007 | WO2007047637A3 Improved audio synchronizer control and communications method and apparatus |
06/14/2007 | WO2007028095A3 Method and apparatus for converting parallel data to serial data in high speed applications |
06/14/2007 | US20070136602 User authentication system and method for supporting terminal mobility between user lines |
06/14/2007 | US20070133341 Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations |
06/14/2007 | US20070133340 Automatic address transition detection (atd) control for reduction of sense amplifier power consumption |
06/14/2007 | US20070133339 Data interface device for accessing memory |
06/14/2007 | US20070133332 Semiconductor memory apparatus |
06/14/2007 | US20070133331 Device and method for reducing refresh current consumption |
06/14/2007 | US20070133330 Semiconductor memory device |
06/14/2007 | US20070133328 Ferroelectric memory device and electronic apparatus |
06/14/2007 | US20070133327 Memory output circuit and method thereof |
06/14/2007 | US20070133322 Memory and method for improving the reliability of a memory having a used memory region and an unused memory region |
06/14/2007 | US20070133321 Reconstruction of signal timing in integrated circuits |
06/14/2007 | US20070133320 Circuit and method of boosting voltage for a semiconductor memory device |
06/14/2007 | US20070133315 Dynamic random access memory device and associated refresh cycle |
06/14/2007 | US20070133314 Integrated Circuit Devices Having Dual Data Rate (DDR) Output Circuits Therein |
06/14/2007 | US20070133313 Data output circuit of semiconductor memory device and operation method thereof |
06/14/2007 | US20070133312 Flash with consistent latency for read operations |
06/14/2007 | US20070133311 Memory with flexible serial interfaces and method for accessing memory thereof |
06/14/2007 | US20070133310 Memory using a single-node data, address and control bus |
06/14/2007 | US20070133309 Memory with a memory cell comprising a MOS transistor with an isolated body and method of accessing |
06/14/2007 | US20070133308 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein |
06/14/2007 | US20070133279 Reducing the Effects of Noise in Non-Volatile Memories Through Multiple Roads |
06/14/2007 | US20070133276 Operating array cells with matched reference cells |
06/14/2007 | US20070133253 Test mode control device using nonvolatile ferroelectric memory |