| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 05/10/2007 | US20070104001 Current Reduction Circuit of Semiconductor Device |
| 05/10/2007 | US20070103997 System for restricting data access |
| 05/10/2007 | US20070103996 Data input/output circuit having data inversion determination function and semiconductor memory device having the same |
| 05/10/2007 | US20070103995 Address decoding |
| 05/10/2007 | US20070103993 Personal Portable Devices |
| 05/10/2007 | US20070103976 Flexible and Area Efficient Column Redundancy for Non-Volatile Memories |
| 05/10/2007 | US20070103968 Non-volatile memory device conducting comparison operation |
| 05/10/2007 | US20070103960 Method for operating a data storage apparatus employing passive matrix addressing |
| 05/10/2007 | US20070103959 Method And Apparatus For Reducing Leakage Current In A Read Only Memory Device Using Shortened Precharge Phase |
| 05/10/2007 | DE10341320B4 Differenzverstärkerschaltung Differential amplifier circuit |
| 05/10/2007 | DE102006052397A1 Non-volatile semiconductor memory e.g. phase-change RAM for portable electronic device, has biasing circuit driven by boosting circuit for applying bias to sense node and sense amplifier for detecting voltage of sense node |
| 05/10/2007 | DE102006049206A1 Leserverstärkerorganisation für Zwei-Zellen-Speicherbausteine Sense amplifier organization for two-cell memory modules |
| 05/10/2007 | DE102006048857A1 Verfahren und Vorrichtung zum Reduzieren von Synchronisiererschatten Method and apparatus for reducing Synchronisiererschatten |
| 05/10/2007 | DE102006047943A1 Arbeitszykluskorrekturvorrichtung Duty cycle corrector |
| 05/10/2007 | DE102006045724A1 Direktzugriffsspeicher mit einer ersten und einer zweiten Spannungsquelle Random access memory having a first and a second voltage source |
| 05/10/2007 | DE102006043311A1 Speichersystem Storage system |
| 05/10/2007 | DE102006043007A1 Eingangspuffer, Speicherbauelement, Speichersteuereinheit und Speichersystem Input buffer, memory device, memory controller and memory system |
| 05/10/2007 | DE102005053496A1 Memory unit e.g. programmable read only memory unit, has bit line, ground line and memory cells, which are assigned to transistors, where bit line and ground line run parallel to each other |
| 05/10/2007 | DE102005053486A1 Schaltungsanordnung zur Erzeugung eines n-Bit Ausgangszeigers, Halbleiterspeicher und Verfahren Circuit arrangement for generating an n-bit output pointer, the semiconductor memory and method |
| 05/10/2007 | DE102005053294A1 Schaltungsanordnung zur zeitlichen Verzögerung von Lesedaten, Halbleiterspeicherschaltung und Verfahren Circuit arrangement for the time delay of the read data, the semiconductor memory circuit and method |
| 05/10/2007 | DE102005045311B4 Halbleiterspeicher, insbesondere Halbleiterspeicher mit Leseverstärker und Bitleitungs-Schalter A semiconductor memory, in particular semiconductor memory having sense amplifiers and bit line switch |
| 05/10/2007 | DE102004041331B4 Codesender, insbesondere zur Verwendung in einem Speichercontroller Code transmitters, in particular for use in a memory controller |
| 05/10/2007 | DE10156749B4 Speicher, Prozessorsystem und Verfahren zum Durchführen von Schreiboperationen auf einen Speicherbereich Memory, processor system and method for performing write operations to a storage area |
| 05/09/2007 | EP1783775A2 Semiconductor memory device |
| 05/09/2007 | EP1782429A1 Repair of memory cells |
| 05/09/2007 | EP1782217A2 A solid-state memory storage device for storing data wirelessly transmitted from a host and for wirelessly transmitting the data to the host |
| 05/09/2007 | EP1668465B1 Device used for the synchronization of clock signals, and clock signal synchronization method |
| 05/09/2007 | EP1423848B1 Independent asynchronous boot block for synchronous non-volatile memory devices |
| 05/09/2007 | EP1200964B1 Method and apparatus for adjusting control signal timing in a memory device |
| 05/09/2007 | CN2899036Y Loundspeaker with playing function |
| 05/09/2007 | CN2898944Y Universal MP3 playing module |
| 05/09/2007 | CN1961379A Method and apparatus for a dual power supply to embedded non-volatile memory |
| 05/09/2007 | CN1959845A 3D read / write method for RAM in field programmable gate array |
| 05/09/2007 | CN1959841A Memory circuit |
| 05/09/2007 | CN1959840A Disc / SD card / MMC card / MP3 player |
| 05/09/2007 | CN1959839A System and method for deriving clocks in a memory system |
| 05/09/2007 | CN1959838A 半导体存储器装置 The semiconductor memory device |
| 05/09/2007 | CN1959837A 半导体存储器件 The semiconductor memory device |
| 05/09/2007 | CN1959698A Optical recognized point-reading device for invisible codes |
| 05/09/2007 | CN1959657A Portable memory device with timing and displaying application information functions, and method |
| 05/09/2007 | CN1959622A Hard disk based on FLASH |
| 05/09/2007 | CN1315192C Semiconductor memory device |
| 05/08/2007 | US7216214 System and method for re-ordering memory references for access to memory |
| 05/08/2007 | US7216198 DRAM with super self-refresh and error correction for extended period between refresh operations |
| 05/08/2007 | US7215596 Circuit and method for controlling inversion of delay locked loop and delay locked loop and synchronous semiconductor memory device using the same |
| 05/08/2007 | US7215595 Memory device and method using a sense amplifier as a cache |
| 05/08/2007 | US7215594 Address latch circuit of memory device |
| 05/08/2007 | US7215593 Semiconductor storage device |
| 05/08/2007 | US7215592 Memory device with reduced word line resistance |
| 05/08/2007 | US7215589 Semiconductor memory device that requires refresh operations |
| 05/08/2007 | US7215588 Apparatus for controlling self-refresh period in memory device |
| 05/08/2007 | US7215587 Tracking circuit for a memory device |
| 05/08/2007 | US7215586 Apparatus and method for repairing a semiconductor memory |
| 05/08/2007 | US7215585 Method and apparatus for synchronizing data from memory arrays |
| 05/08/2007 | US7215584 Method and/or apparatus for training DQS strobe gating |
| 05/08/2007 | US7215583 Circuit for inhibition of program disturbance in memory devices |
| 05/08/2007 | US7215582 Controlling multiple signal polarity in a semiconductor device |
| 05/08/2007 | US7215581 Triple redundant latch design with low delay time |
| 05/08/2007 | US7215580 Non-volatile memory control |
| 05/08/2007 | US7215579 System and method for mode register control of data bus operating mode and impedance |
| 05/08/2007 | US7215570 Spin based device with low transmission barrier |
| 05/08/2007 | US7215563 Multi-layered memory cell structure |
| 05/08/2007 | US7215136 Semiconductor integrated circuits with power reduction mechanism |
| 05/03/2007 | WO2006070353A3 Method and system for securely identifying computer storage devices |
| 05/03/2007 | US20070101413 System and method of using personal data |
| 05/03/2007 | US20070101224 Circuit for Generating Data Strobe Signal in DDR Memory Device, and Method Therefor |
| 05/03/2007 | US20070101152 Token authentication system |
| 05/03/2007 | US20070101088 Semiconductor intergrated circuit and data processing system |
| 05/03/2007 | US20070097781 DDR II write data capture calibration |
| 05/03/2007 | US20070097773 Semiconductor memory device and method of adjusting same |
| 05/03/2007 | US20070097772 Semiconductor storage device and refresh control method therefor |
| 05/03/2007 | US20070097771 Asynchronous first-in first-out cell |
| 05/03/2007 | US20070097770 Method and arrangement in inverter |
| 05/03/2007 | US20070097769 Semiconductor memory |
| 05/03/2007 | US20070097768 System and method for capacitive mis-match bit-line sensing |
| 05/03/2007 | US20070097767 Amplifier for low-voltage applications |
| 05/03/2007 | US20070097766 Electro-optic device, method for driving the same, and electronic device |
| 05/03/2007 | US20070097765 Dynamic sense amplifier for SRAM |
| 05/03/2007 | US20070097764 Capacitor supported precharging of memory digit lines |
| 05/03/2007 | US20070097762 Semiconductor storage device, redundancy circuit thereof, and portable electronic device |
| 05/03/2007 | US20070097759 Method of reducing settling time in flash memories and improved flash memory |
| 05/03/2007 | US20070097755 Method for comparing a first data set with a second data set |
| 05/03/2007 | US20070097754 Voltage regulator for a bit line of a semiconductor memory cell |
| 05/03/2007 | US20070097753 Memory device, memory system and method of inputting/outputting data into/from the same |
| 05/03/2007 | US20070097752 High speed digital signal input buffer and method using pulsed positive feedback |
| 05/03/2007 | US20070097751 Method and apparatus for varying the programming duration and/or voltage of an electrically floating body transistor, and memory cell array implementing same |
| 05/03/2007 | DE102006051213A1 Sampling clock signals generating device for e.g. random access memory chip, involves generating local clock signals with phase correlation with respect to internal signal and sampling clock signals by phase interpolation of local signals |
| 05/03/2007 | DE102006046300A1 Niedrig ausgeglichener Leseverstärker für Zwillingszellen-DRAMs Low-balanced sense amplifier for twin cell DRAM |
| 05/03/2007 | DE102006043642A1 Verzögerungsregelschleifenstruktur, die ein erstes und zweites eingerastetes Taktsignal liefert Delay locked loop structure that provides a first and second clock signal locked in place |
| 05/03/2007 | DE102006036825A1 Halbleiterspeicheranordnung mit seriellem Steuer-/Adressbus A semiconductor memory device with serial control / address |
| 05/03/2007 | DE102005052058A1 Voltage regulator for electrically erasable programmable ROM, has FET with source connected to inverter input and gate linked to inverter output, and band gap reference voltage source that predetermines voltage in which input is regulated |
| 05/03/2007 | DE102005042522A1 Integrated circuit for memory module, has memory circuit to store data with control connection for applying control signal, and control circuit that disables switch when control signal exhibits level after creating last data at connection |
| 05/02/2007 | EP1779581A1 Flash memory with integrated male and female connectors |
| 05/02/2007 | EP1779346A2 Enhanced techniques for using core based nodes for state transfer |
| 05/02/2007 | EP1490876A4 Low-power driver with energy recovery |
| 05/02/2007 | CN2896446Y Disposable digit audio-frequency playing device |
| 05/02/2007 | CN1957530A Charge pump clock for non-volatile memories |
| 05/02/2007 | CN1957422A Automatic hidden refresh in a DRAM and method therefor |
| 05/02/2007 | CN1957318A Throttling memory in a computer system |
| 05/02/2007 | CN1956338A DLL circuit and semiconductor device incorporating the same |