| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 07/26/2007 | DE102007003421A1 Masken-ROM und zugehöriges Datenschutzverfahren Mask ROM and related privacy practices |
| 07/25/2007 | EP1673781B1 Memory cell array with staggered local inter-connect structure |
| 07/25/2007 | EP1537582B1 Method and apparatus for setting and compensating read latency in a high speed dram |
| 07/25/2007 | CN2927259Y Portable intelligent reader |
| 07/25/2007 | CN1328646C Semiconductor device containing changeable detdcting circuit and its starting method |
| 07/25/2007 | CN101004945A Circuit for enabling sense amplifier and semiconductor memory device having the same |
| 07/25/2007 | CN101004942A Semiconductor storage device for realizing power cut-off information display function |
| 07/25/2007 | CN101004939A Apparatus and method of playing back audio signal |
| 07/25/2007 | CN101004938A Apparatus and method for reproducing audio signal |
| 07/25/2007 | CN101004664A Memory cards, nonvolatile memories and methods for copy-back operations thereof |
| 07/25/2007 | CN101004659A Mobile storage method and device of supporting interfaces of SATA and USB |
| 07/24/2007 | US7249296 Semiconductor integrated circuit |
| 07/24/2007 | US7249295 Test circuit for semiconductor device |
| 07/24/2007 | US7249294 Semiconductor memory device with reduced package test time |
| 07/24/2007 | US7249289 Method of deciding error rate and semiconductor integrated circuit device |
| 07/24/2007 | US7248535 Semiconductor memory devices having negatively biased sub word line scheme and methods of driving the same |
| 07/24/2007 | US7248534 Semiconductor memory device |
| 07/24/2007 | US7248532 Device, system and method for reducing power in a memory device during standby modes |
| 07/24/2007 | US7248530 Integrated semiconductor memory device |
| 07/24/2007 | US7248529 Semiconductor device having fuse and its manufacture method |
| 07/24/2007 | US7248528 Refresh control method of a semiconductor memory device and semiconductor memory device |
| 07/24/2007 | US7248527 Self refresh period control circuits |
| 07/24/2007 | US7248526 Refresh period generating circuit |
| 07/24/2007 | US7248525 Semiconductor memory device and refresh method for the same |
| 07/24/2007 | US7248524 Operating temperature optimization in a ferroelectric or electret memory |
| 07/24/2007 | US7248523 Static random access memory (SRAM) with replica cells and a dummy cell |
| 07/24/2007 | US7248522 Sense amplifier power-gating technique for integrated circuit memory devices and those devices incorporating embedded dynamic random access memory (DRAM) |
| 07/24/2007 | US7248521 Negative voltage discharge scheme to improve snapback in a non-volatile memory |
| 07/24/2007 | US7248520 Semiconductor memory and data read method of the same |
| 07/24/2007 | US7248518 Self-timed memory device providing adequate charging time for selected heaviest loading row |
| 07/24/2007 | US7248517 Semiconductor memory device having local data line pair with delayed precharge voltage application point |
| 07/24/2007 | US7248516 Data compression read mode for memory testing |
| 07/24/2007 | US7248515 Non-volatile memory with test rows for disturb detection |
| 07/24/2007 | US7248514 Semiconductor memory device |
| 07/24/2007 | US7248513 Semiconductor memory device having memory block configuration |
| 07/24/2007 | US7248512 Semiconductor memory device having controller with improved current consumption |
| 07/24/2007 | US7248511 Random access memory including selective activation of select line |
| 07/24/2007 | US7248506 Circuit arrangement having security and power saving modes |
| 07/24/2007 | US7248496 MRAM read sequence using canted bit magnetization |
| 07/24/2007 | US7248493 Memory system having improved random write performance |
| 07/24/2007 | US7248492 Method and apparatus for CAM with reduced cross-coupling interference |
| 07/24/2007 | US7248085 Internal reset signal generator for use in semiconductor memory |
| 07/19/2007 | WO2007080097A1 Memory having status register read function |
| 07/19/2007 | US20070168829 Methods to make DRAM fully compatible with SRAM |
| 07/19/2007 | US20070168773 Semiconductor memory unit with repair circuit |
| 07/19/2007 | US20070168321 Data accessing method, device in which the data accessing method is executed and recording medium |
| 07/19/2007 | US20070165481 Method for performing a burn-in test |
| 07/19/2007 | US20070165476 Clock signal generating circuit |
| 07/19/2007 | US20070165475 Tri-state output driver arranging method and memory device using the same |
| 07/19/2007 | US20070165474 Circuit for enabling sense amplifier and semiconductor memory device having the same |
| 07/19/2007 | US20070165473 Semiconductor memory device |
| 07/19/2007 | US20070165472 Method and apparatus for evaluating and optimizing a signaling system |
| 07/19/2007 | US20070165471 Internally asymmetric method for evaluating static memory cell dynamic stability |
| 07/19/2007 | US20070165468 Semiconductor memory device |
| 07/19/2007 | US20070165467 Semiconductor integrated circuit device |
| 07/19/2007 | US20070165465 Repair i/o fuse circuit of semiconductor memory device |
| 07/19/2007 | US20070165464 Memory device for early stabilizing power level after deep power down mode exit |
| 07/19/2007 | US20070165448 Static memory cell having independent data holding voltage |
| 07/19/2007 | US20070165441 High speed otp sensing scheme |
| 07/19/2007 | US20070165436 High-speed and low-power differential non-volatile content addressable memory cell and array |
| 07/19/2007 | DE102006062385A1 Hochgeschwindigkeitsschnittstellenhalbleiterelement, -system und -verfahren High-speed interface semiconductor element, system and method |
| 07/19/2007 | DE102006053153A1 Arbeitszykluskorrekturvorrichtung Duty cycle corrector |
| 07/19/2007 | DE102004047663B4 Speicherschaltung mit einer Initialisierungseinheit, sowie Verfahren zum Optimieren von Datenempfangsparametern in einem Speichercontroller Memory circuit having a initialization unit, and to methods for optimizing data reception parameters in a memory controller |
| 07/18/2007 | EP1808861A1 Multi-port memory based on a plurality of memory cores |
| 07/18/2007 | EP1807766A2 De-coupled memory access system and method |
| 07/18/2007 | EP1595261B1 Dram output circuitry supporting sequential data capture to reduce core access times |
| 07/18/2007 | EP1446723B1 Method employed by a base station for transferring data |
| 07/18/2007 | EP1366495B1 High speed signal path and method |
| 07/18/2007 | CN1327612C 扩频时钟发生器 Spread Spectrum Clock Generator |
| 07/18/2007 | CN1327447C Semiconductor storage equipment and electronic information equipment using said device |
| 07/18/2007 | CN1327446C Magnetic random access storage device and the reading method thereof |
| 07/18/2007 | CN1327368C External Connection device, host device and data communication system |
| 07/18/2007 | CN101002282A Semiconductor storage device and redundancy method for semiconductor storage device |
| 07/18/2007 | CN101002272A Addressing data within dynamic random access memory |
| 07/18/2007 | CN101002271A Semiconductor storage device and semiconductor storage device control method |
| 07/18/2007 | CN101002184A Solid-state memory storage device for storing data wireless transmitted from host computer and transmitting data wirelessly to host computer |
| 07/18/2007 | CN101000799A Apparatus and method for supplying voltage in semiconductor device |
| 07/18/2007 | CN101000796A Control module and method of double data speed synchronous dynamic RAM |
| 07/18/2007 | CN101000795A 半导体存储装置 The semiconductor memory device |
| 07/18/2007 | CN101000794A Semiconductor memory device having ram zone and rom zone |
| 07/18/2007 | CN101000793A Digital circuit and digital circuit adjustment method |
| 07/18/2007 | CN101000590A Method and system for reading data in memory |
| 07/18/2007 | CN101000534A 存储器控制器 The memory controller |
| 07/17/2007 | US7246250 Memory device controls delay time of data input buffer in response to delay control information based on a position of a memory device received from memory controller |
| 07/17/2007 | US7246215 Systolic memory arrays |
| 07/17/2007 | US7245549 Semiconductor memory device and method of controlling the semiconductor memory device |
| 07/17/2007 | US7245548 Techniques for reducing leakage current in memory devices |
| 07/17/2007 | US7245546 Reduced area, reduced programming voltage CMOS efuse-based scannable non-volatile memory bitcell |
| 07/17/2007 | US7245545 Memory |
| 07/17/2007 | US7245544 Integrated semiconductor memory device including sense amplifiers |
| 07/17/2007 | US7245543 Data read circuit for use in a semiconductor memory and a method therefor |
| 07/17/2007 | US7245541 Active termination control |
| 07/17/2007 | US7245540 Controller for delay locked loop circuits |
| 07/17/2007 | US7245522 Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device |
| 07/17/2007 | US7245520 Random access memory including nanotube switching elements |
| 07/17/2007 | US7245140 Parameter measurement of semiconductor device from pin with on die termination circuit |
| 07/12/2007 | WO2007079295A2 Dense read-only memory |
| 07/12/2007 | WO2007078710A1 Clock deskewing method, apparatus, and system |
| 07/12/2007 | WO2007078072A1 Device and method for memory interface |
| 07/12/2007 | WO2007022393A3 Memory row and column redundancy |