Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2013
07/04/2013WO2013101554A1 Metablock size reduction using on chip page swapping between planes
07/04/2013WO2013101250A1 Operation aware auto-feedback sram
07/04/2013WO2013100982A1 Apparatus and method for improving power delivery in a memory, such as, a random access memory
07/04/2013WO2012122221A3 Using low voltage regulator to supply power to a source-biased power domain
07/04/2013US20130173858 Method for Scheduling Memory Refresh Operations Including Power States
07/04/2013US20130170292 High voltage tolerant row driver
07/04/2013US20130170290 Spin device, driving method of the same, and production method of the same
07/04/2013US20130170289 Low voltage write time enhanced sram cell and circuit extensions
07/04/2013US20130170288 Dual port register file memory cell with reduced susceptibility to noise during same row access
07/04/2013US20130170287 Stable memory source bias over temperature and method
07/04/2013US20130170286 Decoupling capacitance calibration devices and methods for dram
07/04/2013US20130170282 Variable resistance memory device
07/04/2013US20130170281 Variable resistance memory device and method for fabricating the same
07/04/2013US20130170280 Semiconductor memory device
07/04/2013US20130170279 Current Writing Circuit for a Resistive Memory Cell Arrangement
07/04/2013US20130170278 Resistive random access memory cell and resistive random access memory module
07/04/2013US20130169830 Image sensing and printing device
07/04/2013DE112005002275B4 Technik zum Lesen von Mehrpegelspeichern mit virtueller Masse Technology for reading multilevel Save virtual ground
07/04/2013DE10251670B4 Einschaltsignalgenerator für Halbleiterspeichereinrichtungen Einschaltsignalgenerator for semiconductor memory devices
07/04/2013DE102007060710B4 Verfahren in einem halbleiterspeicherbauelement zum steuern der verbindung eines leseverstärkers mit und der trennung von einem ersten bzw. zweiten speicherarraysegment und entsprechende steuerschaltungen A method in a semiconductor memory device for controlling the connection with a sense amplifier and the separation of a first and second memory array segment and corresponding control circuits
07/03/2013EP2610874A1 Optimized read threshold search for reading of analog memory cells
07/03/2013EP2610873A2 Quantifying the read and write margins of memory bit cells
07/03/2013EP2609622A2 Wide input output memory with low density, low latency and high density, high latency blocks
07/03/2013CN103189973A Integrated circuit chip customization using backside access
07/03/2013CN103189923A Sense amplifier with selectively powered inverter
07/03/2013CN103187523A 半导体器件及其制造方法 Semiconductor device and manufacturing method thereof
07/03/2013CN103187098A Decoupling capacitance calibration devices and methods for DRAM
07/03/2013CN103187093A Static random access memory and access control method and bit line pre-charging circuit thereof
07/03/2013CN103187092A Semiconductor memory device storing memory characteristic information, memory module and memory system having the same, and operating method thereof
07/03/2013CN103187091A Self-refresh method for DRAM
07/03/2013CN102315108B Laser annealing method used for complex structure semiconductor device
07/03/2013CN101814313B Single-tube single-capacitor type (1T1C) ferroelectric random access memory (FeRAM)
07/03/2013CN101689400B Dynamic verify based on threshold voltage distribution
07/03/2013CN101499437B Non-volatile memory device and method of manufacturing the same
07/02/2013US8477538 Flash memory device and a method of programming the same
07/02/2013US8477537 Write-precompensation and variable write backoff
07/02/2013US8477532 Flash memory device configured to switch wordline and initialization voltages
07/02/2013US8477530 Non-uniform switching based non-volatile magnetic based memory
07/02/2013US8477529 Embedded magnetic random access memory (MRAM)
07/02/2013US8477528 Magnetic memory cell and magnetic random access memory
07/02/2013US8477527 SRAM timing cell apparatus and methods
07/02/2013US8477526 Low noise memory array
07/02/2013US8477525 Nonvolatile semiconductor memory and manufacturing method of nonvolatile semiconductor memory
07/02/2013US8477524 Nonvolatile memory devices and related methods and systems
07/02/2013US8477523 Phase change memory adaptive programming
07/02/2013US8477522 Ferroelectric memory write-back
07/02/2013US8476933 Receiver circuit of semiconductor apparatus and method for receiving signal
07/02/2013US8476724 Spin wave device
07/02/2013US8476612 Method for forming a lateral phase change memory element
06/2013
06/27/2013WO2013096505A1 Methodology for recovering failed bit cells in an integrated circuit memory
06/27/2013WO2013096334A1 Method of making device
06/27/2013WO2013095846A1 Mitigating variations arising from simultaneous multi-state sensing
06/27/2013WO2013095676A1 Separate microchannel voltage domains in stacked memory architecture
06/27/2013WO2013095675A1 Dynamic memory performance throttling
06/27/2013WO2013095674A1 Memory operations using system thermal sensor data
06/27/2013WO2013095540A1 Memory with elements having two stacked magnetic tunneling junction (mtj) devices
06/27/2013WO2013095357A1 Method for reducing size and center positioning of magnetic memory element contacts
06/27/2013WO2013095139A2 Magnetization reversal
06/27/2013US20130163322 Parallel programming scheme in multi-bit phase change memory
06/27/2013US20130163321 Drift mitigation for multi-bits phase change memory
06/27/2013US20130163320 Energy-efficient row driver for programming phase change memory
06/27/2013US20130163319 Multi-port non-volatile memory that includes a resistive memory element
06/27/2013US20130163318 Self-Referenced MRAM Cell and Method for Writing the Cell Using a Spin Transfer Torque Write Operation
06/27/2013US20130163317 Memory element and memory apparatus
06/27/2013US20130163316 Memory element and memory apparatus
06/27/2013US20130163315 Memory element and memory apparatus
06/27/2013US20130163314 Memory element and memory apparatus
06/27/2013US20130163313 Magnetoelectric memory
06/27/2013US20130163312 Sram timing tracking circuit
06/27/2013US20130163310 Resistive memory
06/27/2013US20130163307 Memory Device Correcting the Effect of Collisions of High-Energy Particles
06/26/2013EP2608208A1 Self-referenced MRAM cell and method for writing the cell using a spin transfer torque write operation
06/26/2013CN103180953A Magnetic device, and method for reading from and writing to said device
06/26/2013CN103177757A Clock and control signal generation for high performance memory devices
06/26/2013CN103177756A Power saving method of dynamic memory under read operation and column selection signal driving circuit of dynamic memory
06/26/2013CN102332295B Memory circuit and method for reading data by applying same
06/26/2013CN102024823B Integrated circuit with embedded SRAM and technical method thereof
06/26/2013CN101800074B Memory circuits, systems, and methods for providing bit line equalization voltages
06/26/2013CN101711414B Non-volatile memory and method for predictive programming
06/25/2013US8472275 Semiconductor memory device changing refresh interval depending on temperature
06/25/2013US8472274 Using temperature sensors with a memory device
06/25/2013US8472268 Non-volatile semiconductor memory and simultaneous writing of data
06/25/2013US8472266 Reducing neighbor read disturb
06/25/2013US8472260 Semiconductor memory apparatus and method for discharging wordline thereof
06/25/2013US8472258 Semiconductor nonvolatile memory device
06/25/2013US8472255 Compensation of non-volatile memory chip non-idealities by program pulse adjustment
06/25/2013US8472253 Semiconductor memory device
06/25/2013US8472251 Single-polycrystalline silicon electrically erasable and programmable nonvolatile memory device
06/25/2013US8472249 Semiconductor memory having both volatile and non-volatile functionality and method of operating
06/25/2013US8472248 Semiconductor memory and control method thereof
06/25/2013US8472245 Nonvolatile memory device, system and programming method with dynamic verification mode selection
06/25/2013US8472244 Spin torque transfer memory cell structures and methods
06/25/2013US8472243 Storage apparatus
06/25/2013US8472242 Magnetoresistive effect memory
06/25/2013US8472241 Phase change random access memory device
06/25/2013US8472240 Spin torque transfer memory cell structures and methods
06/25/2013US8472239 Nanowire mesh FET with multiple threshold voltages
06/25/2013US8472238 Variable resistance nonvolatile storage device with oxygen-deficient oxide layer and asymmetric substrate bias effect
06/25/2013US8472237 Semiconductor devices and methods of driving the same
06/25/2013US8472236 Differential plate line screen test for ferroelectric latch circuits
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