Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
05/2013
05/21/2013US8446765 Semiconductor memory device having memory block configuration
05/21/2013US8446764 Control voltage generation circuit and non-volatile memory device including the same
05/21/2013US8446762 Methods of making a semiconductor memory device
05/21/2013US8446761 Method and system for providing multiple logic cells in a single stack
05/21/2013US8446760 Multilevel programming of phase change memory
05/21/2013US8446759 Multilevel programming of phase change memory
05/21/2013US8446758 Variable resistance memory programming
05/21/2013US8446757 Spin-torque transfer magneto-resistive memory architecture
05/21/2013US8446756 Method of stabilizing data hold operations of a storage device
05/21/2013US8446755 Multiple cycle memory write completion
05/21/2013US8446754 Semiconductor memory apparatus and method of driving the same
05/21/2013US8446753 Reference cell write operations at a memory
05/21/2013US8446752 Programmable metallization cell switch and memory units containing the same
05/21/2013US8446751 Semiconductor memory device
05/21/2013US8445979 Magnetic memory devices including magnetic layers separated by tunnel barriers
05/21/2013US8445946 Gated diode memory cells
05/21/2013US8445122 Data storage medium and associated method
05/16/2013WO2013071254A2 Circuit and method for generating a reference level for a magnetic random access memory element
05/16/2013WO2013071176A2 Three port mtj structure and integration
05/16/2013WO2013070493A1 Method and apparatus to provide data including hard bit data and soft bit data to a rank modulation decoder
05/16/2013WO2013068221A1 Circuit for reverse biasing inverters for reducing the power consumption of an sram memory
05/16/2013US20130124795 Semiconductor device and data processing system
05/16/2013US20130123136 Real-time electronic cell sensing system and applications for cytotoxicity profiling and compound assays
05/16/2013US20130121070 Memory Device
05/16/2013US20130121068 Magnetic memory cell
05/16/2013US20130121067 High speed low power magnetic devices based on current induced spin-momentum transfer
05/16/2013US20130121066 Circuit and method for generating a reference level for a magnetic random access memory element
05/16/2013US20130121065 Dynamic wordline assist scheme to improve performance tradeoff in sram
05/16/2013US20130121064 Memory Based Illumination Device
05/16/2013US20130121060 Non-volatile memory elements and memory devices including the same
05/16/2013US20130121059 Multi-valued logic device having nonvolatile memory device
05/16/2013US20130121058 Circuit and method for controlling write timing of a non-volatile memory
05/16/2013US20130121057 Resistor thin film mtp memory
05/16/2013US20130121056 Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
05/16/2013DE102005002526B9 Wärmeunterstützte Magnetspeichervorrichtung mit gesteuerter Temperatur Heat-assisted magnetic memory device with controlled temperature
05/16/2013DE102004040765B4 Halbleiterspeicher und Verfahren zur Herstellung des Halbleiterspeichers A semiconductor memory and method of manufacturing the semiconductor memory
05/15/2013EP2592624A2 Metal doped non-volatile resistive memory elements
05/15/2013EP2592553A2 Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding
05/15/2013EP2592552A2 Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding
05/15/2013EP2592551A2 Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding
05/15/2013CN103109324A Spin torque transfer memory cell structures and methods
05/15/2013CN103107076A Manufacturing method of separate grid type flash memory and memory set
05/15/2013CN103106919A Multistage resistance conversion storage device
05/15/2013CN103106918A Two-port static random access memory using single-port memory unit
05/15/2013CN103106917A Semiconductor manufacturing method
05/15/2013CN103106916A Storage and read circuit and comparison circuit thereof
05/15/2013CN102157194B Static random access memory and method therefor
05/15/2013CN102148056B Static random access memory macro and method for operating same
05/14/2013USRE44218 Semiconductor memory device for controlling write recovery time
05/14/2013US8443244 Blind and decision directed multi-level channel estimation
05/14/2013US8443131 Non-volatile memory device
05/14/2013US8441886 System and method for processing signals in high speed DRAM
05/14/2013US8441878 Embedded memory databus architecture
05/14/2013US8441866 Method for programming a floating gate
05/14/2013US8441864 Self refresh circuit
05/14/2013US8441863 Non-volatile memory device with reconnection circuit
05/14/2013US8441861 Self-check calibration of program or erase and verify process using memory cell distribution
05/14/2013US8441857 Programming a nonvolatile memory device using a bias voltage to a well of a memory block
05/14/2013US8441852 Stacked memory device and method of fabricating same
05/14/2013US8441851 Semiconductor storage circuit
05/14/2013US8441850 Magnetic random access memory (MRAM) layout with uniform pattern
05/14/2013US8441849 Reducing programming time of a memory cell
05/14/2013US8441848 Set pulse for phase change memory programming
05/14/2013US8441847 Programming multi-level phase change memory cells
05/14/2013US8441846 Semiconductor memory device and method for testing the same
05/14/2013US8441845 Semiconductor memory device and control method thereof
05/14/2013US8441844 Method for writing in a MRAM-based memory device with reduced power consumption
05/14/2013US8441843 Semiconductor integrated circuit device
05/14/2013US8441842 Memory device having memory cells with enhanced low voltage write capability
05/14/2013US8441841 Semiconductor device and driving method of semiconductor device
05/14/2013US8441840 Semiconductor device and data processing system
05/14/2013US8441839 Cross point variable resistance nonvolatile memory device
05/14/2013US8441838 Resistive-switching nonvolatile memory elements
05/14/2013US8441837 Variable resistance nonvolatile memory device
05/14/2013US8441836 Sector array addressing for ECC management
05/14/2013US8441835 Interface control for improved switching in RRAM
05/14/2013US8441834 Resistive memory element sensing using averaging
05/14/2013US8441833 Differential plate line screen test for ferroelectric latch circuits
05/14/2013US8441083 Semiconductor device including a magnetic tunnel junction and method of manufacturing the same
05/14/2013US8441056 NROM memory cell, memory array, related devices and methods
05/14/2013US8441053 Vertical capacitor-less DRAM cell, DRAM array and operation of the same
05/10/2013WO2013066584A1 A method of programming a split gate non-volatile floating gate memory cell having a separate erase gate
05/09/2013US20130114364 Semiconductor device performing refresh operation
05/09/2013US20130114348 Self refresh pulse generation circuit
05/09/2013US20130114336 Three port mtj structure and integration
05/09/2013US20130114335 Memory sensing circuit
05/09/2013US20130114334 Magnetoresistive random access memory cell with independently operating read and write components
05/09/2013US20130114333 Semiconductor memory device and fabrication process thereof
05/09/2013US20130114332 Reducing read disturbs and write fails in a data storage cell
05/09/2013US20130114331 Control signal generation circuit and sense amplifier circuit using the same
05/09/2013US20130114330 Semiconductor memory device and driving method thereof
05/09/2013US20130114328 Low-Complexity Electronic Circuit and Methods of Forming the Same
05/09/2013US20130114326 Semiconductor memory apparatus and test circuit therefor
05/09/2013US20130114325 Non-volatile random access memory coupled to a first, second and third voltage and operation method thereof
05/09/2013US20130114324 Integrated Circuit Comprising a FRAM Memory and Method for Granting Read-Access to a FRAM Memory
05/08/2013CN103098203A Wide input output memory with low density, low latency and high density, high latency blocks
05/08/2013CN103098137A Systems and methods of non-volatile memory sensing including selective/differential threshold voltage features
05/08/2013CN103094283A 8-bit semi-conductor storage unit, manufacture method and storage unit array of 8-bit semi-conductor storage unit
05/08/2013CN103093816A Phase change memory driving circuit and setting and resetting method
05/08/2013CN103093809A Static random access memory unit resisting single event upset
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