Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
03/2013
03/28/2013US20130077388 Magnetic memory element, magnetic memory device, spin transistor, and integrated circuit
03/28/2013US20130077387 Semiconductor device
03/28/2013US20130077386 Semiconductor Device And Driving Method Of The Same
03/28/2013US20130077385 Semiconductor device
03/28/2013US20130077384 Cross point variable resistance nonvolatile memory device and method of reading thereby
03/28/2013US20130077382 Hybrid memory device, system including the same, and method of reading and writing data in the hybrid memory device
03/28/2013US20130077381 Highly integrated programmable non-volatile memory and manufacturing method thereof
03/28/2013US20130077379 Semiconductor memory device, semiconductor device and method of manufacturing semiconductor memory device
03/28/2013US20130077378 Spin torque transfer memory cell structures and methods
03/28/2013US20130076390 Programmable Logic Sensing in Magnetic Random Access Memory
03/27/2013CN103003885A Solid, multi-state molecular random access memory (RAM)
03/27/2013CN103003884A Nonvolatile semiconductor storage device and read-out method thereof
03/27/2013CN103003883A Structures and methods for a field-reset spin-torque MRAM
03/27/2013CN103000806A Resistance change nonvolatile memory device, semiconductor device, and method of operating resistance change nonvolatile memory device
03/27/2013CN103000223A Method for operating pseudo-static RAM and related memory device
03/27/2013CN103000222A Memory device capable of bi-directionally tracing time sequence parameters
03/27/2013CN103000221A Semiconductor apparatus
03/27/2013CN103000220A Semiconductor device and method of operating the semiconductor device
03/27/2013CN103000217A Memories with selective precharge
03/27/2013CN102194514B Fully balanced dual-port memory cell
03/27/2013CN102176673B LUT4 (look up table), logical unit of FPGA (field programmed gate array) and logical block of FPGA
03/27/2013CN102097122B NAND flash controller circuit of multi-channel shared data cache region
03/27/2013CN102089881B Methods for fabricating gated lateral thyristor-based random access memory (GLTRAM) cells
03/27/2013CN101958147B Phase change memory device and method
03/27/2013CN101903954B Systems and methods for low power, high yield memory
03/27/2013CN101789261B Semiconductor memory circuit and control method for reading data
03/27/2013CN101779246B Clock and control signal generation for high performance memory devices
03/27/2013CN101770807B Write optimization circuit for phase change memory and write optimization method thereof
03/27/2013CN101770806B Sense amplifier used in the write operations of SRAM
03/27/2013CN101770805B Read/write margin improvement in SRAM design using dual-gate transistors
03/27/2013CN101743597B Methods, circuits, and systems to select memory regions
03/27/2013CN101681678B Delta sigma sense amplifier comprising digital filters and memory
03/27/2013CN101665678B Electric tristable material, and preparation and application thereof
03/27/2013CN101657859B Spin transfer torque magnetoresistive random access memory and design methods
03/27/2013CN101645305B Static random access memory (SRAM) for automatically tracking data
03/27/2013CN101601094B Reading memory cells using multiple thresholds
03/27/2013CN101373632B Resistance variable memory device and operating method thereof
03/27/2013CN101256833B 半导体存储器件 A semiconductor memory device
03/26/2013US8407564 Prediction and cancellation of systematic noise sources in non-volatile memory
03/26/2013US8407396 Providing block data access for an operating system using solid-state memory
03/26/2013US8406076 FRDY pull-up resistor activation
03/26/2013US8406063 Programming non-volatile storage with synchonized coupling
03/26/2013US8406062 Charge recycling memory system and a charge recycling method thereof
03/26/2013US8406061 Semiconductor memory apparatus
03/26/2013US8406058 Read only memory and operating method thereof
03/26/2013US8406057 Nonvolatile semiconductor storage device
03/26/2013US8406054 Semiconductor memory device with improved ECC efficiency
03/26/2013US8406053 On chip dynamic read for non-volatile storage
03/26/2013US8406049 Nonvolatile semiconductor memory device and writing method thereof
03/26/2013US8406047 Memory devices having select gates with P type bodies, memory strings having separate source lines and methods
03/26/2013US8406046 Domain-wall motion type magnetic random access memory with inclined regions and initializing method
03/26/2013US8406045 Three terminal magnetic element
03/26/2013US8406044 Write driver, semiconductor memory apparatus using the same and programming method
03/26/2013US8406043 Phase change memory apparatus having global bit line and method for driving the same
03/26/2013US8406042 Magnetic memory with strain-assisted exchange coupling switch
03/26/2013US8406041 Scalable magnetic memory cell with reduced write current
03/26/2013US8406039 Low-leakage power supply architecture for an SRAM array
03/26/2013US8406038 Semiconductor device
03/26/2013US8406037 Apparatus and a method
03/26/2013US8406036 Semiconductor memory device
03/26/2013US8406035 Nonvolatile memory device and method of writing data to nonvolatile memory device
03/26/2013US8406034 Semiconductor memory device
03/26/2013US8406033 Memory device and method for sensing and fixing margin cells
03/26/2013US8406032 Memory devices and methods of operating the same
03/26/2013US8405174 Non-volatile magnetic memory with low switching current and high thermal stability
03/26/2013US8405134 Magnetic tunnel junction device
03/22/2013DE202007019468U1 Bewertungseinheit in einer Speichervorrichtung Evaluation unit in a memory device
03/21/2013WO2013040145A1 Substrate bias during program of nand flash non-volatile storage
03/21/2013WO2013040072A1 Strain induced reduction of switching current in spintransfer torque switching devices
03/21/2013WO2013040069A1 Symmetrically switchable spin-transfer-torque magnetoresistive device
03/21/2013WO2013040066A1 Adaptive read wordline voltage boosting apparatus and method for multi-port sram
03/21/2013WO2013040065A1 Improving sram cell writability
03/21/2013WO2013040061A1 Apparatus for selective word-line boost on a memory cell
03/21/2013WO2013039685A1 Driver circuitry for displays
03/21/2013WO2013039666A1 Data modification based on matching bit patterns
03/21/2013WO2013038281A1 Antiferromagnetic storage device
03/21/2013WO2013037195A1 Large-capacity multi-value resistive random access memory
03/21/2013WO2013037048A1 Memory system with a layer comprising a dedicated redundancy area
03/21/2013WO2013016401A4 Simultaneous sensing of multiple wordlines and detection of nand failures
03/21/2013WO2013012800A3 Magneto-electronic devices and methods of production
03/21/2013WO2013003223A3 Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices
03/21/2013US20130070540 Voltage regulation for 3d packages and method of manufacturing same
03/21/2013US20130070539 Dynamic random access memory with fully independent partial array refresh function
03/21/2013US20130070523 Magnetic memory element and nonvolatile memory device
03/21/2013US20130070522 Nonvolatile memory device
03/21/2013US20130070521 Magnetic Random Access Memory Devices Including Heating Straps
03/21/2013US20130070520 Magnetic Random Access Memory Devices Including Shared Heating Straps
03/21/2013US20130070519 Read architecture for mram
03/21/2013US20130070518 Antiferromagnetic storage device
03/21/2013US20130070517 Resistance Change Memory
03/21/2013US20130070516 Variable resistance nonvolatile memory device and driving method thereof
03/21/2013US20130070515 Method and apparatus for controlling state information retention in an apparatus
03/21/2013US20130070514 Integrated circuit with on-die distributed programmable passive variable resistance fuse array and method of making same
03/21/2013US20130070512 Non-volatile memory device
03/21/2013US20130070511 Select devices for memory cell applications
03/21/2013US20130069964 Method and apparatus for providing complimentary state retention
03/21/2013US20130069693 Sense amplifier and electronic apparatus using the same
03/21/2013DE202007019469U1 Vorrichtung zum Kommunizieren von Befehls- und Adresssignalen Apparatus for communicating command and address signals
03/21/2013DE102005002526B4 Wärmeunterstützte Magnetspeichervorrichtung mit gesteuerter Temperatur Heat-assisted magnetic memory device with controlled temperature
03/21/2013DE10084993B3 Ausgabeschaltung für einen mit doppelter Datenrate arbeitenden dynamischen Speicher mit wahlfreiem Zugriff (DDR DRAM), ein mit doppelter Datenrate arbeitender dynamischer Speicher mit wahlfreiem Zugriff (DDR DRAM), ein Verfahren zum getakteten Auslesen von Daten aus mit doppelter Datenrate arbeitenden dynamischen Speicher mit wahlfreiem Zugriff (DDR DRAM) Output circuit for a working double data rate dynamic random access memory (DDR DRAM), a working double data rate dynamic random access memory (DDR DRAM), a method for timed reading data from working double data rate dynamic random access memory ( DDR DRAM)
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