Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2013
06/04/2013US8456888 Semiconductor memory device including variable resistance elements and manufacturing method thereof
06/04/2013US8456886 Reliable set operation for phase-change memory cell
06/04/2013US8456885 Random access memory circuit
06/04/2013US8456883 Method of spin torque MRAM process integration
06/04/2013US8456882 Method and system for providing dual magnetic tunneling junctions usable in spin transfer torque magnetic memories
06/04/2013US8455967 Memory element and memory device
06/04/2013US8455346 Method for manufacturing nonvolatile memory device
05/2013
05/30/2013WO2013077962A1 Scrub techniques for use with dynamic read
05/30/2013WO2013077044A1 Semiconductor storage device and driving method thereof
05/30/2013WO2013075225A1 Memory system and method using stacked memory device dice
05/30/2013WO2013075220A1 Power saving methods for use in a system of serially connected semiconductor devices
05/30/2013US20130136137 Apparatus and method for data transmission
05/30/2013US20130135954 Memory cell array latchup prevention
05/30/2013US20130135941 Enhanced Data Retention Mode for Dynamic Memories
05/30/2013US20130135925 Structure and method for biasing phase change memory array for reliable writing
05/30/2013US20130135924 Programming of phase-change memory cells
05/30/2013US20130135923 Phase change memory device and data storage device having the same
05/30/2013US20130135922 Floating Source Line Architecture for Non-Volatile Memory
05/30/2013US20130135921 Semiconductor memory device
05/30/2013US20130135920 Access signal adjustment circuits and methods for memory cells in a cross-point array
05/30/2013US20130135919 Semiconductor storage device
05/30/2013US20130135918 Semiconductor memory device
05/30/2013US20130134393 Nanotube Field Effect Devices and Methods of Making Same
05/29/2013EP2597693A1 Self-referenced MRAM cell with optimized reliability
05/29/2013EP2597692A1 Self-referenced MRAM cell with optimized reliability
05/29/2013EP2597648A2 Non-equal threshold voltage ranges in MLC NAND flash memory devices
05/29/2013EP2597646A2 Memory module
05/29/2013EP2597645A2 Memory module
05/29/2013EP2596500A1 Programming non-volatile memory with bit line voltage step up
05/29/2013DE102005025168B4 Elektronische Speichervorrichtung und Verfahren zum Betreiben einer elektronischen Speichervorrichtung Electronic memory device and method of operating an electronic memory device
05/29/2013DE10031479B4 Leistungsversorgungssteuervorrichtung zum Ändern der Art der Versorgungsleitungsverbindung in Reaktion auf die Betriebsweise in einem Halbleiterspeicherbauteil Power supply control means for changing the nature of the supply line connection in response to the operation in a semiconductor memory device
05/29/2013CN103124998A Resistance based memory having two-diode access device
05/29/2013CN103123809A Device for storing a frequency and method for storing and reading out a frequency
05/29/2013CN103123808A Method for high-speed writing operation of dynamic random access memory (DRAM)
05/29/2013CN103123807A High-speed read operation method of dynamic random access memory
05/29/2013CN103123806A Control circuit of DRAM (dynamic random access memory) column selection signal and access memory comprising same
05/29/2013CN103123805A 2T dynamic memory unit and array structure based on resistance variation gate dielectric and method for operating same
05/29/2013CN103123804A 1.5T dynamic memory unit and array based on resistance variation gate dielectric and method for operating same
05/29/2013CN103123803A Semiconductor memory device and driving method thereof
05/29/2013CN101859779B Polarized tuning ferroelectric film diode memory
05/29/2013CN101836260B Integrated circuit memory having dynamically adjustable read margin and method therefor
05/29/2013CN101819812B Interleaved memory circuit and method of interleaving accesses thereof
05/29/2013CN101572118B Semiconductor memory device and access method thereof
05/28/2013USRE44242 Semiconductor memory
05/28/2013US8451681 Semiconductor storage device including memory cells each having a variable resistance element
05/28/2013US8451664 Determining and using soft data in memory devices and systems
05/28/2013US8451663 Method of programming nonvolatile memory device including first and second sense operations in program loop
05/28/2013US8451657 Nonvolatile semiconductor memory device using MIS transistor
05/28/2013US8451656 Multi-level memory devices and methods of operating the same
05/28/2013US8451655 MRAM cells and circuit for programming the same
05/28/2013US8451654 Semiconductor memory device
05/28/2013US8451653 Semiconductor integrated circuit having a test function for detecting a defective cell
05/28/2013US8451652 Write assist static random access memory cell
05/28/2013US8451651 Semiconductor device
05/28/2013US8451650 Capacitor-less memory cell, device, system and method of making same
05/28/2013US8451649 Self pre-charging and equalizing bit line sense amplifier
05/28/2013US8451648 Resistance-change memory and method of operating the same
05/28/2013US8451647 Resistance control method for nonvolatile variable resistive element
05/28/2013US8451646 Resistive random access memory and the method of operating the same
05/28/2013US8451645 Variable resistance memory devices and methods of programming variable resistance memory devices
05/28/2013US8451644 Non-volatile sampler
05/28/2013US8451643 Semiconductor memory device rewriting data after execution of multiple read operations
05/28/2013US8451642 Hybrid MRAM array structure and operation
05/28/2013US8451511 Method and device for optically scanning an object and device
05/28/2013US8450818 Methods of forming spin torque devices and structures formed thereby
05/28/2013US8450716 Resistive memory
05/28/2013US8450047 Method of controlling the states and vortex chirality in hexagonal ring structures comprising nanoscale magnetic elements
05/23/2013WO2013075102A1 Hybrid read scheme for spin torque mram
05/23/2013WO2013074528A1 Non-volatile storage with broken word line screen and data recovery
05/23/2013WO2013074516A1 Improved read operation for non-volatile storage system with nand strings sharing bit line and word lines
05/23/2013WO2013074407A1 Techniques for protecting a supercon-ducting (sc) tape
05/23/2013WO2013072331A1 Sense amplifier with dual gate precharge and decode transistors
05/23/2013US20130132662 Memory management unit, image processing device, and integrated circuit
05/23/2013US20130132661 Method and apparatus for refresh management of memory modules
05/23/2013US20130128682 Memory system with dynamic refreshing
05/23/2013US20130128659 Self-referenced mram cell with optimized reliability
05/23/2013US20130128658 Write driver circuit and method for writing to a spin-torque mram
05/23/2013US20130128657 Hybrid read scheme for spin torque mram
05/23/2013US20130128656 Sram memory device and testing method thereof
05/23/2013US20130128655 Method and apparatus for dual rail sram level shifter with latching
05/23/2013US20130128652 Device for Storing a Frequency and Method for Storing and Reading Out a Frequency
05/23/2013US20130128651 Nonvolatile memory device
05/23/2013US20130128650 Data-masked analog and digital read for resistive memories
05/23/2013US20130128649 Memory cells, semiconductor devices including such cells, and methods of fabrication
05/23/2013US20130127494 Memory elements with relay devices
05/23/2013DE102004041335B4 Datentreiberschaltung und zugehöriger Halbleiterbaustein Data driver circuit and associated semiconductor device
05/22/2013EP2593940A1 Fast random access to non-volatile storage
05/22/2013EP2593938A1 Method and system for providing magnetic tunneling junction elements having laminated free layers and memories using such magnetic elements
05/22/2013CN103119655A Fast random access to non-volatile storage
05/22/2013CN103119654A Spin torque transfer memory cell structures and methods
05/22/2013CN103119653A Spin torque transfer memory cell structures and methods
05/22/2013CN103117086A Semiconductor memory device and operation method thereof
05/22/2013CN101819816B Phase change memory
05/22/2013CN101783390B Memory cell having improved mechanical stability and manufacturing method thereof
05/22/2013CN101447224B Pre-charge time controlling for global bit line of high speed EDRAM
05/21/2013US8448044 Retrieving data from a dispersed storage network in accordance with a retrieval threshold
05/21/2013US8446778 Method for operating a flash memory device
05/21/2013US8446776 Method of programming memory cells for a non-volatile memory device
05/21/2013US8446772 Memory die self-disable if programmable element is not trusted
05/21/2013US8446769 Nonvolatile memory devices with common source line voltage compensation and methods of operating the same
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