Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
04/2013
04/30/2013US8431980 Random access memory device utilizing a vertically oriented select transistor
04/30/2013US8430326 Semiconductor device
04/25/2013WO2013058960A2 Compact sense amplifier for non-volatile memory
04/25/2013WO2013057785A1 Semiconductor device
04/25/2013WO2012170465A3 Asymmetric static random access memory cell with dual stress liner
04/25/2013US20130100742 Nonvolatile memory device
04/25/2013US20130100733 Memory device and electronic apparatus
04/25/2013US20130100732 Array Structural Design of Magnetoresistive Random Access Memory (MRAM) Bit Cells
04/25/2013US20130100731 Independenty-controlled-gate sram
04/25/2013US20130100730 Method and apparatus for word line suppression
04/25/2013US20130100729 Dynamic memory cell provided with a field-effect transistor having zero swing
04/25/2013US20130100728 Semiconductor device and method for forming the same
04/25/2013US20130100727 Overwriting a memory array
04/25/2013US20130100726 Multi-level memory cell with continuously tunable switching
04/25/2013US20130100725 System and method for mram having controlled averagable and isolatable voltage reference
04/25/2013US20130100724 High density molecular memory storage with read and write capabilities
04/24/2013EP2583281A1 Magnetorelectric memory
04/24/2013CN103069564A Magnetoresistive element and magnetic random-access memory
04/24/2013CN103069494A Natural threshold voltage distribution compaction in non-volatile memory
04/24/2013CN103069493A Magnetic memory cell
04/24/2013CN103066200A Forming method and forming device of magnetic tunnel junction with three-dimensional structure
04/24/2013CN103066199A Novel magnetic tunnel junction device and manufacture method thereof
04/24/2013CN103066198A Novel magnetic tunnel junction (MTJ) device and manufacturing method thereof
04/24/2013CN103065679A Electric field write-in and resistance readout solid-state storage component, storer and read-write method of storer
04/24/2013CN103065677A Self-calibration system based on delay cell
04/24/2013CN103065676A Refresh control circuit and method of semiconductor apparatus
04/24/2013CN103065675A Memory system
04/24/2013CN103065674A Semiconductor memory device implementing comprehensive partial array self refresh scheme
04/24/2013CN103065673A Combined memory block and data processing system having the same
04/24/2013CN103065672A Asynchronous static random access memory based on internet protocol (IP) of synchronous static random access memory
04/24/2013CN102044292B Multi-level cell programming of PCM by varying the reset amplitude
04/24/2013CN102013271B Fast reading device and method of phase change memory
04/24/2013CN101796591B Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
04/24/2013CN101685825B Integrated circuit including diode memory cells
04/24/2013CN101663816B Software programmable logic using spin transfer torque magnetoresistive devices
04/24/2013CN101573761B Nonvolatile memory with variable read threshold
04/24/2013CN101558449B Nonvolatile nanotube diodes
04/24/2013CN101540196B 半导体装置 Semiconductor device
04/24/2013CN101512661B Combined distortion estimation and error correction coding for memory devices
04/24/2013CN101461008B Non-volatile semiconductor memory with page erase
04/24/2013CN101202104B Dynamic random access memory circuit , integrated circuit and method for reading and writing memory unit
04/23/2013US8429374 System and method for read-while-write with NAND memory device
04/23/2013US8429313 Configurable ready/busy control
04/23/2013US8427887 Devices, systems, and methods for a power generator system
04/23/2013US8427881 Semiconductor memory device and programming method thereof
04/23/2013US8427880 Operating memory cells
04/23/2013US8427879 Method for enabling a SONOS transistor to be used as both a switch and a memory
04/23/2013US8427872 Nonvolatile memory device and system performing repair operation for defective memory cell
04/23/2013US8427870 Nonvolatile memory device, method, system including the same, and operating method thereof
04/23/2013US8427868 Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
04/23/2013US8427867 Systems and methods for averaging error rates in non-volatile devices and storage systems
04/23/2013US8427866 Magnetic storage element and magnetic storage device
04/23/2013US8427865 Semiconductor storage device
04/23/2013US8427864 Semiconductor storage device
04/23/2013US8427863 Low current switching magnetic tunnel junction design for magnetic memory using domain wall motion
04/23/2013US8427862 Reading a phase change memory
04/23/2013US8427861 Semiconductor memory device
04/23/2013US8427860 Memory component, memory device, and method of operating memory device
04/23/2013US8427859 Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells
04/23/2013US8427202 Nonvolatile logic circuit and a method for operating the same
04/23/2013US8427199 Magnetic logic gate
04/23/2013US8426222 Magnetic stack with oxide to reduce switching current
04/23/2013CA2414920C A high speed dram architecture with uniform access latency
04/18/2013WO2013055695A1 Apparatus, system, and method for writing multiple magnetic random access memory cells with a single field line
04/18/2013WO2013055473A1 Multi-bit spin-momentum-transfer magnetoresistence random access memory with single magnetic-tunnel-junction stack
04/18/2013WO2013054389A1 Semiconductor device
04/18/2013WO2013054098A1 Method of pinning domain walls in a nanowire magnetic memory device
04/18/2013WO2013028434A3 Memory device readout using multiple sense times
04/18/2013WO2013028430A3 Memory device with reduced sense time readout
04/18/2013WO2013016397A3 Post-write read in non-volatile memories using comparison of data as written in binary and multi-state formats
04/18/2013US20130094317 Refresh control circuit and method of semiconductor apparatus
04/18/2013US20130094316 Memory system
04/18/2013US20130094298 Storage devices with soft processing
04/18/2013US20130094285 Phase change memory device having multi-level and method of driving the same
04/18/2013US20130094284 Magnetoresistance effect element and magnetic memory
04/18/2013US20130094283 Apparatus, System, and Method for Writing Multiple Magnetic Random Access Memory Cells with a Single Field Line
04/18/2013US20130094282 Multi-bit spin-momentum-transfer magnetoresistence random access memory with single magnetic-tunnel-junction stack
04/18/2013US20130094280 Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Comprising Resistive Change Material and Method of Operating
04/18/2013US20130094279 Semiconductor device
04/18/2013US20130094278 Non-Volatile Memory Cell Containing an In-Cell Resistor
04/18/2013US20130094277 Resistive memory apparatus, layout structure, and sensing circuit thereof
04/18/2013US20130094276 Apparatuses and methods for determining stability of a memory cell
04/18/2013US20130094275 Stabilization of resistive memory
04/18/2013US20130094274 Method for driving semiconductor memory device
04/18/2013DE10261328B4 Kompensation überkreuzter Bitleitungen in DRAMs mit Redundanz Compensation of crossed bit lines in DRAMs with redundancy
04/18/2013DE102008001534B4 Transistor mit reduzierter Ladungsträgermobilität und assoziierte Verfahren sowie SRAM-Zelle mit solchen Transistoren Transistor with reduced charge carrier mobility and associated procedures, and SRAM cell transistors such
04/17/2013EP2580757A1 Variable impedance circuit controlled by a ferroelectric capacitor
04/17/2013EP2580756A2 Non-volatile memory having 3d array of read/write elements and read/write circuits and method thereof
04/17/2013CN202886907U Chip capable of realizing low-power-consumption mode
04/17/2013CN1826659B Memory system, method for reading data stored in the memory system and method for executed by the memory system
04/17/2013CN103052989A Latching circuit
04/17/2013CN103050147A Terminating device system
04/17/2013CN103050146A High-duty-ratio DDR2 (double data rate) digital delay chain circuit
04/17/2013CN102169714B Method for refreshing bulk-silicon floating body cell transistor memory
04/17/2013CN102157195B Low-voltage static random access memory unit, memory and writing operation method
04/17/2013CN102157193B Voltage adjuster of memory
04/17/2013CN101533849B Resistive memory devices and method of forming the same
04/17/2013CN101388240B Semiconductor storage device
04/16/2013US8422332 Apparatus for generating a voltage and non-volatile memory device having the same
04/16/2013US8422309 Voltage generation circuit and nonvolatile memory device using the same
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