Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2013
09/26/2013US20130250662 Tamper-resistant mram utilizing chemical alteration
09/26/2013US20130250661 Memory cells, semiconductor device structures, systems including such cells, and methods of fabrication
09/26/2013US20130250660 Stable SRAM Cell
09/26/2013US20130250659 Semiconductor memory device
09/26/2013US20130250656 Resistance-variable memory device
09/26/2013US20130250653 Driving method of semiconductor storage device and semiconductor storage device
09/26/2013US20130250651 Multi-function resistance change memory cells and apparatuses including the same
09/26/2013US20130250650 Semiconductor device and method for controlling the same
09/26/2013US20130250649 Semiconductor device and method for controlling the same
09/26/2013DE112011104319T5 Phasenwechselmaterial-Zelle mit piezoelektrischer oder ferroelektrischer Verspannung induzierender Auskleidung Phase change material cell with piezoelectric or ferroelectric strain inducing liner
09/26/2013DE112011103750T5 Nichtflüchtiger Magnettunnelübergang-Transistor Non-volatile magnetic tunnel junction transistor
09/25/2013EP2641331A1 Method and circuit for switching a memristive device
09/25/2013EP2641330A1 Method and circuit for switching a memristive device in an array
09/25/2013EP2641247A2 Bipolar spin-transfer switching
09/25/2013CN103329204A Magnetic memory element
09/25/2013CN103325938A Phase-change random access memory device having multi-levels and method of manufacturing the same
09/25/2013CN103325414A RRAM memory read circuit
09/25/2013CN103325413A Integrated circuit with memory cells comprising addressing bit lines and adjacent bit lines, and operation method
09/25/2013CN103325412A Integrated circuit with dynamic sensing intervals and operation method thereof
09/25/2013CN103325411A Single event upset resisting reinforcing system and method used for FPGA (Field Programmable Gate Array)
09/25/2013CN103325410A Method for reading polarization storage state of ferroelectric memory by light
09/25/2013CN101982894B Magnetic domain data storage devices manufacturing method
09/25/2013CN101930792B Memory and write control method
09/25/2013CN101563729B Hybrid solid-state memory system having volatile and non-volatile memory
09/25/2013CN101548329B Memory system and method with serial and parallel modes
09/24/2013US8542787 Phase adjustment apparatus and method for a memory device signaling system
09/24/2013US8542542 Non-volatile memory cell healing
09/24/2013US8542540 Nonvolatile memory and methods for manufacturing the same with molecule-engineered tunneling barriers
09/24/2013US8542539 NAND flash memory programming
09/24/2013US8542538 Semiconductor memory device which stores plural data in a cell
09/24/2013US8542536 System and method for detecting disturbed memory cells of a semiconductor memory device
09/24/2013US8542535 Controlling select gate voltage during erase to improve endurance in non volatile memory
09/24/2013US8542534 Select gate programming in a memory device
09/24/2013US8542532 Memory access method and flash memory using the same
09/24/2013US8542531 Charge equilibrium acceleration in a floating gate memory device via a reverse field pulse
09/24/2013US8542529 Non-volatile memory and method with power-saving read and program-verify operations
09/24/2013US8542528 Semiconductor device and method for driving semiconductor device
09/24/2013US8542527 Magnetic memory cell
09/24/2013US8542526 Magnetic random access memory (MRAM) manufacturing process for a small magnetic tunnel junction (MTJ) design with a low programming current requirement
09/24/2013US8542525 MRAM-based memory device with rotated gate
09/24/2013US8542524 Magnetic random access memory (MRAM) manufacturing process for a small magnetic tunnel junction (MTJ) design with a low programming current requirement
09/24/2013US8542523 Method for fabricating a DRAM capacitor having increased thermal and chemical stability
09/24/2013US8542522 Non-volatile data-storage latch
09/24/2013US8542521 Semiconductor storage device including memory cells capable of holding data
09/24/2013US8542520 Resistive memory element and use thereof
09/24/2013US8542519 Semiconductor memory device
09/24/2013US8542518 Photo-responsive memory resistor and method of operation
09/24/2013US8542513 Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells
09/24/2013US8541830 Nonvolatile semiconductor memory device and method for manufacturing the same
09/24/2013US8541766 Nonvolatile memory device and nonvolatile memory apparatus
09/19/2013WO2013138469A1 Spin torque transfer magnetic tunnel junction intelligent sensing
09/19/2013WO2013138199A1 Non-volatile storage with read process that reduces disturb
09/19/2013WO2013136331A1 Memory and logic device and methods for performing thereof
09/19/2013WO2013136145A1 Instruction to compute the distance to a specified memory boundary
09/19/2013WO2013134890A1 Nonconsecutive sensing of multilevel memory cells
09/19/2013US20130244058 CoFeSiB/Pt Multilayers Exhibiting Perpendicular Magnetic Anisotropy
09/19/2013US20130242679 Semiconductor memory device for controlling write recovery time
09/19/2013US20130242674 Semiconductor device, method for controlling the same, and semiconductor system
09/19/2013US20130242651 Non-volatile semiconductor memory device
09/19/2013US20130242649 Method, system, and device for storage cell, such as for memory
09/19/2013US20130242648 Approach for phase change memory cells targeting different device specifications
09/19/2013US20130242647 Magnetic memory
09/19/2013US20130242646 Magnetoresistive random access memory (mram) die including an integrated magnetic security structure
09/19/2013US20130242645 Memory Cell
09/19/2013US20130242644 Memory cell and memory array
09/19/2013US20130242643 Semiconductor memory device including power decoupling capacitor
09/19/2013US20130242638 Resistance-change type non-volatile semiconductor memory
09/19/2013US20130242637 Memelectronic Device
09/19/2013US20130240964 Magnetic storage apparatus
09/19/2013DE112012000271T5 Ferromagnetische Einheit, die hohe Domänenwandgeschwindigkeiten gewährleistet Ensures Ferromagnetic unit, the high domain wall velocities
09/19/2013DE102013101399A1 Signalverfolgung in Schreiboperationen von Speicherzellen Signal tracking write operations of memory cells
09/19/2013DE102006051213B4 Speichervorrichtung und Verfahren zur Erzeugung eines Abtastungstaktsignals in einem Kommunikationsblock einer Speichervorrichtung Memory device and method for generating a sample clock signal in a communication block of a memory device
09/18/2013CN1839445B A polymer memory having a ferroelectric polymer memory material and manufacture method thereof
09/18/2013CN103311435A Resistance random access memory based on vanadium oxide/aluminum oxide laminated structure and manufacturing method thereof
09/18/2013CN103311432A Self-referenced MRAM cell and method for writing the cell
09/18/2013CN103310835A Memory cell and memory array
09/18/2013CN103310834A Structure and method for a sram circuit
09/18/2013CN103310833A Semiconductor memory and method of making the same
09/18/2013CN102394103B Single-ended bit line write-in circuit
09/18/2013CN102376353B Random storage
09/18/2013CN102290094B Low power consumption circuit for reliably keeping self-refresh state of memory
09/18/2013CN102197482B Generating and exploiting an asymmetric capacitance hysteresis of ferroelectric MIM capacitors
09/18/2013CN102034532B System and method for digital retention voltage generation
09/18/2013CN102034523B Semiconductor storage device and method for reducing area of chip of semiconductor storage device
09/18/2013CN101354915B Phase change device, memory system using the same and method for reading the memory device
09/17/2013US8539139 Managing device wearout using I/O metering
09/17/2013US8537625 Memory voltage regulator with leakage current voltage control
09/17/2013US8537623 Devices and methods of programming memory cells
09/17/2013US8537620 Random telegraph signal noise reduction scheme for semiconductor memories
09/17/2013US8537619 Nonvolatile semiconductor storage device and method of controlling and manufacturing the same
09/17/2013US8537618 RAM memory device with NAND type interface
09/17/2013US8537617 Source side asymmetrical precharge programming scheme
09/17/2013US8537614 Erase block data splitting
09/17/2013US8537613 Multi-layer memory system
09/17/2013US8537611 Natural threshold voltage distribution compaction in non-volatile memory
09/17/2013US8537610 Techniques for providing a semiconductor memory device
09/17/2013US8537609 Memory device and method of operating the same
09/17/2013US8537608 Data cells with drivers and methods of making and operating the same
09/17/2013US8537607 Staggered magnetic tunnel junction
09/17/2013US8537606 Read sensing circuit and method with equalization timing
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