Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2013
09/04/2013CN101604549B Circuit and method for operating a circuit
09/04/2013CN101393772B Multi-level memory devices and methods of operating the same
09/04/2013CN101192648B Resistive random access memory and method of manufacturing the same
09/03/2013US8526250 Address delay circuit of semiconductor memory apparatus
09/03/2013US8526242 Flash memory and fabrication method and operation method for the same
09/03/2013US8526241 Non-volatile semiconductor memory device capable of improving failure-relief efficiency
09/03/2013US8526234 Controller management of memory array of storage device using magnetic random access memory (MRAM)
09/03/2013US8526233 Ramping pass voltage to enhance channel boost in memory device, with optional temperature compensation
09/03/2013US8526232 Nonvolatile memory device using variable resistive element
09/03/2013US8526231 Non-volatile memory device
09/03/2013US8526229 Semiconductor memory device
09/03/2013US8526228 8-transistor SRAM cell design with outer pass-gate diodes
09/03/2013US8526227 Phase change memory word line driver
09/03/2013US8526226 Current control apparatus and phase change memory having the same
09/03/2013US8526225 Non-volatile memory device
09/03/2013US8526224 Compound cell spin-torque magnetic random access memory
09/03/2013US8526223 Phase change random access memory device and related methods of operation
09/03/2013US8526222 Magnetic random access memory
09/03/2013US8526221 Semiconductor integrated circuit for low and high voltage operations
09/03/2013US8526220 Complementary SOI lateral bipolar for SRAM in a low-voltage CMOS platform
09/03/2013US8526219 Enhanced static random access memory stability using asymmetric access transistors and design structure for same
09/03/2013US8526218 Memory design
09/03/2013US8526217 Low-complexity electronic circuit and methods of forming the same
09/03/2013US8526216 Memory device and manufacturing method the same
09/03/2013US8526215 Spatial correlation of reference cells in resistive memory array
09/03/2013US8526214 Resistor thin film MTP memory
09/03/2013US8526213 Memory cells, methods of programming memory cells, and methods of forming memory cells
09/03/2013US8526212 Semiconductor memory device
09/03/2013US8525280 Array of magnetic tunneling junction film structures with process determined in-plane magnetic anisotropy
08/2013
08/29/2013WO2013126172A1 Improved low voltage write speed bitcell
08/29/2013WO2013126120A1 Superconducting quantum circuit having a resonant cavity thermalized with metal components
08/29/2013WO2013126109A1 Temperature based compensation during verify operations for non-volatile storage
08/29/2013US20130227212 Refresh request queuing circuitry
08/29/2013US20130223142 3d stacked nand flash memory array enabling to operate by lsm and operation method thereof
08/29/2013US20130223141 Magentic memory with a domain wall
08/29/2013US20130223140 Semiconductor memory device
08/29/2013US20130223139 Semiconductor device
08/29/2013US20130223138 Secure non-volatile memory
08/29/2013US20130223137 Low-voltage semiconductor memory
08/29/2013US20130223136 SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor
08/29/2013US20130223135 Semiconductor device
08/29/2013US20130223128 Vertical resistance memory device and a program method thereof
08/29/2013US20130223127 Vertical resistance memory device and a read method thereof
08/29/2013US20130223126 Resistive memory device and memory system including the same
08/29/2013US20130223125 Decoding scheme for bipolar-based diode three-dimensional memory requiring bipolar programming
08/29/2013US20130223124 Variable resistive memory device and method of fabricating and driving the same
08/29/2013US20130222617 Digital camera having image processor and printer
08/29/2013DE102012111282A1 Spannungsgeneratoren, welche an kleine externe Versorgungsspannungen anpassbar sind Voltage generators, which are adaptable to small external supply voltages
08/28/2013EP2631915A2 Programming a memory with varying bits per cell
08/28/2013EP2631914A1 Memory architecture with a current controller and reduced power requirements
08/28/2013EP2631913A2 Field-effect transistor with magnetic layer
08/28/2013EP2631912A1 Field-effect transistor with magnetic layer
08/28/2013EP2630643A1 Reference cell architectures for small memory array block activation
08/28/2013CN103268774A An improved high capacity low cost multi-state magnetic memory
08/28/2013CN102237129B Switched capacitor based negative bitline voltage generation scheme
08/28/2013CN102103885B Method for clearing busy state of secure digital memory card (SD card) and busy state clearing circuit
08/28/2013CN101887753B Heterogeneous storage system and cache optimization method thereof
08/28/2013CN101740116B 8 transistor type low leakage SRAM cell
08/28/2013CN101490764B Method and apparatus to prevent high voltage supply degradation for high-voltage latches of a non-volatile memory
08/28/2013CN101178928B 半导体器件和存储器 A semiconductor device and a memory
08/27/2013US8520454 SRAM device capable of independently controlling a double-gate selection transistor for maintaining an optimal read margin and read speed
08/27/2013US8520450 Semiconductor memory device with optimum refresh cycle according to temperature variation
08/27/2013US8520443 Nonvolatile semiconductor storage device and method for driving the same
08/27/2013US8520438 Program method of nonvolatile memory device
08/27/2013US8520437 High read speed memory with gate isolation
08/27/2013US8520435 Nonvolatile memory device and method of operating the same
08/27/2013US8520434 Method of storing E-fuse data in flash memory device
08/27/2013US8520433 Magnetoresistive element and magnetic memory
08/27/2013US8520432 Magnetic memory with separate read and write paths
08/27/2013US8520431 Devices and methods to program a memory cell
08/27/2013US8520430 Nanowire circuits in matched devices
08/27/2013US8520429 Data dependent SRAM write assist
08/27/2013US8520428 Combined data level-shifter and DE-skewer
08/27/2013US8520427 Memory cell and memory array utilizing the memory cell
08/27/2013US8520426 Method for driving semiconductor device
08/27/2013US8520425 Resistive random access memory with low current operation
08/27/2013US8520424 Composition of memory cell with resistance-switching layers
08/27/2013US8520423 Non-volatile memory device
08/27/2013US8519498 Magnetic stack having reference layers with orthogonal magnetization orientation directions
08/27/2013US8519483 Semiconductor device having a high resistance to ionizing radiation
08/27/2013US8518562 Magnetic storage device
08/22/2013WO2013123437A1 Memory bit repair scheme
08/22/2013WO2013123415A1 Memory cell comprising first and second transistors and methods of operating
08/22/2013WO2013123363A1 Magnetic logic units configured as an amplifier
08/22/2013US20130215700 Semiconductor memory device changing refresh interval depending on temperature
08/22/2013US20130215675 Invalid write prevention for stt-mram array
08/22/2013US20130215674 Spin-transfer torque memory self-reference read method
08/22/2013US20130215673 Magnetoresistive logic cell and method of use
08/22/2013US20130215672 Magnetoresistive logic cell and method of use
08/22/2013US20130215671 Memory bit repair scheme
08/22/2013US20130215670 Memory circuit and field programmable gate array
08/22/2013DE112011102962T5 Halbleiterspeichermatrix und Verfahren zu ihrer Programmierung A semiconductor memory matrix and methods for their programming
08/22/2013DE112011102837T5 Speichereinrichtung und Halbleitereinrichtung Storage device and semiconductor device
08/22/2013DE102013101283A1 Eine Speicherzelle, ein Verfahren zum Ausbilden einer Speicherzelle und ein Verfahren zum Betreiben einer Speicherzelle A memory cell, a method of forming a memory cell and a method of operating a memory cell
08/21/2013EP2629299A1 Memory system and method with serial and parallel modes
08/21/2013EP2628157A1 Memory subsystem for counter-based and other applications
08/21/2013CN203150144U Adjustable static random access memory self-timing circuit
08/21/2013CN203150143U Distributed self-timing circuit
08/21/2013CN203150142U Column selection signal drive circuit for dynamic storage
08/21/2013CN103262414A Method and circuit for switching a memristive device in an array
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