Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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10/08/2013 | US8553445 Semiconductor memory device having stacked structure including resistor-switched based logic circuit and method of manufacturing the same |
10/08/2013 | US8553444 Variable resistance nonvolatile storage device and method of forming memory cell |
10/08/2013 | US8552537 Semiconductor device and method for fabricating the same |
10/03/2013 | WO2013149235A1 Ferroelectric random access memory (fram) layout apparatus and method |
10/03/2013 | WO2013149040A1 A pulse clock generation logic with built-in level shifter and programmable rising edge and pulse width |
10/03/2013 | WO2013148095A1 Non-volatile memory and method having a memory array with a high-speed, short bit-line portion |
10/03/2013 | WO2013147938A1 Selected word line dependent programming voltage |
10/03/2013 | WO2013147937A1 Selected word line dependent select game voltage during program |
10/03/2013 | WO2013147936A1 Selected word line dependent select gate diffusion region voltage during programnming |
10/03/2013 | WO2013147913A1 Delay-compensated error indication signal |
10/03/2013 | WO2013147886A1 Virtual device sparing |
10/03/2013 | WO2013147848A1 Memory cell with improved write margin |
10/03/2013 | WO2013147844A1 Built-in self-test for stacked memory architecture |
10/03/2013 | WO2013147840A1 On chip redundancy repair for memory devices |
10/03/2013 | WO2013147831A1 Spin transfer torque based memory elements for programmable device arrays |
10/03/2013 | WO2013147781A1 Magnetic state element and circuits |
10/03/2013 | WO2013147746A1 Reduction of power consumption in memory devices during refresh modes |
10/03/2013 | WO2013147733A1 Timing optimization for memory devices employing error detection coded transactions |
10/03/2013 | WO2013147728A1 Methods and systems to read a magnetic tunnel junction (mtj) based memory cell based on a pulsed read current |
10/03/2013 | WO2013146563A1 Semiconductor memory device |
10/03/2013 | WO2013146039A1 Semiconductor storage device |
10/03/2013 | US20130262743 Encoding program bits to decouple adjacent wordlines in a memory device |
10/03/2013 | US20130258763 High capaciy low cost multi-state magnetic memory |
10/03/2013 | US20130258762 Reference cell configuration for sensing resistance states of mram bit cells |
10/03/2013 | US20130258761 Dual-port sram with bit line clamping |
10/03/2013 | US20130258760 Handling of write operations within a memory device |
10/03/2013 | US20130258759 Methods and Apparatus for SRAM Cell Structure |
10/03/2013 | US20130258758 Single Cycle Data Copy for Two-Port SRAM |
10/03/2013 | US20130258757 Methods And Apparatus For Synthesizing Multi-Port Memory Circuits |
10/03/2013 | US20130258756 Vertical transistor, memory cell, device, system and method of forming same |
10/03/2013 | US20130258755 Integrated circuit device having programmable input capacitance |
10/03/2013 | US20130258752 Stack memory apparatus |
10/03/2013 | US20130258751 Fram compiler and layout |
10/03/2013 | US20130258750 Dual-cell mtj structure with individual access and logical combination ability |
10/03/2013 | US20130258747 Method and apparatus for read assist to compensate for weak bit |
10/02/2013 | EP2643835A1 Method and apparatus for sharing internal power supplies in integrated circuit devices |
10/02/2013 | EP2643761A1 Dynamically configurable embedded flash memory for electronic devices |
10/02/2013 | DE102013102720A1 Halbleitervorrichtung und Verfahren zum Herstellen derselben A semiconductor device and method of manufacturing the same |
10/02/2013 | CN1941179B 半导体存储装置 The semiconductor memory device |
10/02/2013 | CN103339679A Mapping data to non-volatile memory |
10/02/2013 | CN103337253A Cascade system and method of RRAM logic device |
10/02/2013 | CN103337252A Static random access memory (SRAM) with redundant structure |
10/02/2013 | CN103337251A Dynamic random access memory and access method thereof |
10/02/2013 | CN103337250A Nonvolatile variable resistive random access memory |
10/02/2013 | CN102347066B Integrated circuit and integrated circuit method |
10/02/2013 | CN101393965B Phase change memory device and methods of fabricating the same |
10/02/2013 | CN101278353B 纳米线磁性随机存取存储器 Nanowires magnetic random access memory |
10/01/2013 | US8547776 Multi-port memory based on DRAM core |
10/01/2013 | US8547767 Chip, multi-chip system in a method for performing a refresh of a memory array |
10/01/2013 | US8547763 Memory cell, methods of manufacturing memory cell, and memory device having the same |
10/01/2013 | US8547753 Semiconductor device |
10/01/2013 | US8547752 Method of reading data in non-volatile memory device, and device thereof |
10/01/2013 | US8547751 Non-volatile storage device |
10/01/2013 | US8547750 Methods and devices for memory reads with precharged data lines |
10/01/2013 | US8547749 Multi-pass programming in a memory device |
10/01/2013 | US8547746 Voltage generation and adjustment in a memory device |
10/01/2013 | US8547745 Host-managed logical mass storage device using magnetic random access memory (MRAM) |
10/01/2013 | US8547740 Adaptive estimation of memory cell read thresholds |
10/01/2013 | US8547739 Methods, devices, and systems relating to a memory cell having a floating body |
10/01/2013 | US8547738 Techniques for providing a semiconductor memory device |
10/01/2013 | US8547737 Magnetoresistive element and magnetic memory |
10/01/2013 | US8547736 Generating a non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction |
10/01/2013 | US8547735 Memory element and memory device |
10/01/2013 | US8547734 Method of reading from and writing to magnetic random access memory (MRAM) |
10/01/2013 | US8547733 Magnetic random access memory |
10/01/2013 | US8547732 Hybrid superconducting-magnetic memory cell and array |
10/01/2013 | US8547731 Memory device having a magnetic layer with a perpendicular direction of magnetization relative to a direction of magnetization of a fixed magnetization layer |
10/01/2013 | US8547730 Method and system for providing a spin tunneling magnetic element having a crystalline barrier layer |
10/01/2013 | US8547729 DRAM and memory array |
10/01/2013 | US8547728 Non-volatile memory device and methods for manufacturing the same |
10/01/2013 | US8547727 Memristive device |
10/01/2013 | US8547726 Semiconductor memory device and controlling method thereof |
10/01/2013 | US8547725 Method of programming a nonvolatile memory cell by reverse biasing a diode steering element to set a storage element |
10/01/2013 | US8547721 Resistive memory device |
10/01/2013 | US8546898 Optoelectronic light exposure memory |
10/01/2013 | US8546897 Magnetic memory element |
10/01/2013 | US8546867 Non-volatile memory semiconductor device |
10/01/2013 | US8546865 Nonvolatile memory device having stacked semiconductor layers and common source line adjacent to bit line plug |
10/01/2013 | US8546864 Three dimensional memory and methods of forming the same |
10/01/2013 | US8546196 Non-volatile memory device and manufacturing method thereof |
10/01/2013 | CA2677920C Word line transistor strength control for read and write in spin transfer torque magnetoresistive random access memory |
09/26/2013 | WO2013142713A1 Memory cells, semiconductor device structures, systems including such cells, and methods of fabrication |
09/26/2013 | WO2013141921A1 High capacity memory systems |
09/26/2013 | WO2013112336A3 Adaptive programming and erasure schemes for analog memory cells |
09/26/2013 | US20130254475 Memory refresh method and devices |
09/26/2013 | US20130250711 Memory and method of refreshing a memory |
09/26/2013 | US20130250706 Memory module |
09/26/2013 | US20130250678 Page buffer, memory device comprising page buffer, and related method of operation |
09/26/2013 | US20130250674 Refreshing data of memory cells with electrically floating body transistors |
09/26/2013 | US20130250673 Shared Bit Line SMT MRAM Array with Shunting Transistors Between Bit Lines |
09/26/2013 | US20130250672 Shared bit line smt mram array with shunting transistors between bit lines |
09/26/2013 | US20130250671 Thermally assisted magnetic writing device |
09/26/2013 | US20130250670 Magnetoresistive element and writing method of magnetic memory |
09/26/2013 | US20130250669 Scalable Magnetic Memory Cell With Reduced Write Current |
09/26/2013 | US20130250668 Magnetic memory element, magnetic memory, and magnetic memory device |
09/26/2013 | US20130250667 Method of reading from and writing to magnetic random access memory (mram) |
09/26/2013 | US20130250666 Magnetic memory |
09/26/2013 | US20130250665 Magnetic memory |
09/26/2013 | US20130250664 Semiconductor memory device and driving method of the same |
09/26/2013 | US20130250663 Anti-tampering devices and techniques for magnetoresistive random access memory |