Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2006
08/31/2006US20060193179 Method and apparatus for determining the geometric correspondence between multiple 3D rangefinder data sets
08/31/2006US20060193178 Non-volatile memory device with erase address register
08/31/2006US20060193176 Multiple level programming in a non-volatile memory device
08/31/2006US20060193175 Nonvolatile memory device and method of manufacturing the same
08/31/2006US20060193174 Non-volatile and static random access memory cells sharing the same bitlines
08/31/2006US20060193173 Non-volatile semiconductor memory device and data programming method
08/31/2006US20060193172 High bandwidth datapath load and test of multi-level memory cells
08/31/2006US20060193171 Semiconductor memory devices having signal delay controller and methods performed therein
08/31/2006US20060193170 Electro-optical device, method of manufacturing electro-optical device, and electronic apparatus
08/31/2006US20060193168 Integrated semiconductor memory and method for operating a semiconductor memory
08/31/2006US20060193167 Compact non-volatile memory array with reduced disturb
08/31/2006US20060193166 Semiconductor device and method of operating a semiconductor device
08/31/2006US20060193165 Magnetoresistive element and magnetic memory device
08/31/2006US20060193164 Semiconductor memory device
08/31/2006US20060193163 Program circuit of semiconductor
08/31/2006US20060193162 Ferroelectric Memory and Semiconductor Memory
08/31/2006US20060193161 Processes for turning a SRAM cell off and processess for writing a SRAM cell
08/31/2006US20060192600 Synchronous output buffer, synchronous memory device and method of testing access time
08/31/2006US20060192304 Magnetic annealing sequences for patterned MRAM synthetic antiferromagnetic pinned layers
08/31/2006US20060192254 Semiconductor memory device
08/31/2006US20060192237 Magnetic elements with ballistic magnetoresistance utilizing spin-transfer and an MRAM device using such magnetic elements
08/31/2006DE69833093T2 Schwebende Bitleitungen Prüfmodus mit digital steuerbaren Bitleitungen-Abgleichschaltungen Pending bit test mode with digitally controllable bit lines matching circuits
08/31/2006DE19916348B4 Synchrone Halbleiter-Speichervorrichtung mit Reaktion auf ein externes Maskiersignal zum Erzwingen des Eintritts eines Datenanschlusses in einen Hochimpedanzzustand und ihr Steuerverfahren Synchronous semiconductor memory device having a reaction to an external masking to force the occurrence of a data connection to a high-impedance state and its control method
08/31/2006DE112004001340T5 Referenzstromverteilung in MRAM Bauelementen Reference current distribution in MRAM devices
08/31/2006DE10345755B4 Verfahren zur Herstellung von strukturierten magnetischen Funktionselementen A process for the production of structured magnetic functional elements
08/31/2006DE10249869B4 Magnetische Dünnfilmspeichervorrichtung zum Durchführen eines Datenschreibvorgangs durch Anlegen eines Magnetfelds Thin film magnetic memory device for performing a data write operation by applying a magnetic field
08/31/2006DE102006001108A1 Magnetoresistives Speicherelement mit Stapelstruktur The magnetoresistive memory element stack structure
08/30/2006EP1696600A2 Prediction of an optimal sampling point for clock resynchronization in a source synchronous data channel
08/30/2006EP1696599A2 Source synchronous communication channel interface receive logic
08/30/2006EP1696440A1 Semiconductor memory device and method for its manufacture
08/30/2006EP1695357A2 Nand memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
08/30/2006EP1695353A1 Method for initializing resistance-variable material, memory device containing a resistance-variable material, and method for initializing nonvolatile memory circuit including variable resistor
08/30/2006EP1695352A1 Method and apparatus to improve memory performance
08/30/2006EP1642297A4 Data strobe synchronization circuit and method for double data rate, multi-bit writes
08/30/2006CN1826659A Tracking cells for a memory system
08/30/2006CN1826658A Compensating a long read time of a memory device in data comparison and write operations
08/30/2006CN1825613A Method of operating and structure of phase change random access memory (pram)
08/30/2006CN1825492A Semiconductor memory device capable of switching from multiplex method to non-multiplex method
08/30/2006CN1825483A Nonvolatile memory device and method of programming/reading the same
08/30/2006CN1825481A 半导体器件 Semiconductor devices
08/30/2006CN1825480A Semiconductor memory devices having signal delay controller and methods performed therein
08/30/2006CN1825479A Improved DDR II dram data path
08/30/2006CN1825478A Methods and apparatus for implementing a power down in a memory device
08/30/2006CN1825477A Complementary dynamic storage unit and method for implementing reading, writing and refreshing operation
08/30/2006CN1825476A 半导体存储器装置 The semiconductor memory device
08/30/2006CN1825475A 存储器 Memory
08/30/2006CN1825474A Random access memory having fast column access
08/30/2006CN1825471A 同步与数据恢复装置 Synchronization and data recovery means
08/30/2006CN1825467A Low voltage detector for detecting low voltage of feram
08/30/2006CN1272841C Low-tension detector and method and system for detecting low-tension ferroeletric random access memory
08/30/2006CN1272801C Semiconductor storage device
08/30/2006CN1272688C Semiconductor memory device inverted chip interface circuit and inverted chip interface method
08/29/2006US7099234 Low power sleep mode operation technique for dynamic random access memory (DRAM) devices and integrated circuit devices incorporating embedded DRAM
08/29/2006US7099232 Delay locked loop device
08/29/2006US7099229 Nonvolatile memory device having circuit for stably supplying desired current during data writing
08/29/2006US7099222 Refresh operation type semiconductor memory device capable of smoothly transferring special state to normal active state and its driving method
08/29/2006US7099221 Memory controller method and system compensating for memory cell data losses
08/29/2006US7099220 Methods for erasing flash memory
08/29/2006US7099219 Multi read port bit line
08/29/2006US7099218 Differential current evaluation circuit and sense amplifier circuit for evaluating a memory state of an SRAM semiconductor memory cell
08/29/2006US7099217 Semiconductor memory with sense amplifier equalizer having transistors with gate oxide films of different thicknesses
08/29/2006US7099216 Single cycle read/write/writeback pipeline, full-wordline I/O DRAM architecture with enhanced write and single ended sensing
08/29/2006US7099215 Systems, methods and devices for providing variable-latency write operations in memory devices
08/29/2006US7099212 Embedded ROM device using substrate leakage
08/29/2006US7099211 Flash memory device capable of reducing test time and test method thereof
08/29/2006US7099210 Semiconductor memory device having memory cells with floating gates and memory cell threshold voltage control method
08/29/2006US7099208 Semiconductor memory automatically carrying out refresh operation
08/29/2006US7099207 Semiconductor memory device and method for masking predetermined area of memory cell array during write operation
08/29/2006US7099203 Circuit and method for writing a binary value to a memory cell
08/29/2006US7099202 Y-mux splitting scheme
08/29/2006US7099200 Nonvolatile semiconductor memory
08/29/2006US7099199 Nonvolatile semiconductor memory device
08/29/2006US7099197 Semiconductor memory device
08/29/2006US7099196 Flash memory device and program verification method thereof
08/29/2006US7099195 Methods for neutralizing holes in tunnel oxides of floating-gate memory cells and devices
08/29/2006US7099192 Nonvolatile flash memory and method of operating the same
08/29/2006US7099191 Channel erase type nonvolatile semiconductor memory device and electronic card and electronic apparatus using the device
08/29/2006US7099190 Data storage system
08/29/2006US7099188 Bit line reference circuits for binary and multiple-bit-per-cell memories
08/29/2006US7099187 Read/write circuit for accessing chalcogenide non-volatile memory cells
08/29/2006US7099185 Magnetic memory array, method for recording in a magnetic memory array and method for reading out from a magnetic memory array
08/29/2006US7099184 Magnetic random access memory
08/29/2006US7099183 Semiconductor device
08/29/2006US7099182 Static random access memory and pseudo-static noise margin measuring method
08/29/2006US7099181 Non-volatile dynamic random access memory
08/29/2006US7099180 Phase change memory bits reset through a series of pulses of increasing amplitude
08/29/2006US7099179 Conductive memory array having page mode and burst mode write capability
08/29/2006US7099178 Ferromagnetic random access memory
08/29/2006US7099177 Nonvolatile ferroelectric memory device having power control function
08/29/2006US7099176 Non-orthogonal write line structure in MRAM
08/29/2006US7099173 Stacked layered type semiconductor memory device
08/29/2006US7098712 Register controlled delay locked loop with reduced delay locking time
08/29/2006US7098698 Semiconductor integrated circuit device and sense amplifier of memory
08/29/2006US7098504 Nonvolatile semiconductor storage device and production method therefor
08/29/2006US7098498 Floating-gate semiconductor structures
08/29/2006US7098493 MRAM in-pixel memory for display devices
08/29/2006US7098478 Semiconductor memory device using vertical-channel transistors
08/29/2006US7097777 Magnetic switching device
08/29/2006US7097285 Printhead chip incorporating electro-magnetically operable ink ejection mechanisms
08/29/2006US7097284 Double-action micro-electromechanical device