G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor

Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2006
11/09/2006	US20060250881 Memory arrangement having a plurality of RAM chips
11/09/2006	US20060250876 Semiconductor device
11/09/2006	US20060250873 Dynamic semiconductor storage device
11/09/2006	US20060250872 AC sensing for a resistive memory
11/09/2006	US20060250869 Semiconductor memory device
11/09/2006	US20060250854 Erase discharge method of memory device and discharge circuit performing the method
11/09/2006	US20060250852 Ramp generator and relative row decoder for flash memory device
11/09/2006	US20060250851 Method and system for program pulse generation during programming of nonvolatile electronic devices
11/09/2006	US20060250844 Systems-On-Chips Including Programmed Memory Cells and Programmable and Erasable Memory Cells
11/09/2006	US20060250840 Magnetic memory device
11/09/2006	US20060250839 Read, write and erase circuit for programmable memory devices
11/09/2006	US20060250838 Method and apparatus for low voltage write in a static random access memory
11/09/2006	US20060250837 Nonvolatile memory cell comprising a diode and a resistance-switching material
11/09/2006	US20060250836 Rewriteable memory cell comprising a diode and a resistance-switching material
11/09/2006	US20060250835 Low power driver circuit for a polarization scrambler
11/09/2006	US20060250449 Ink jet nozzle assembly with a thermal bend actuator
11/09/2006	US20060249586 Flexible electrical display
11/09/2006	DE102006021254A1 Auffrischungssteuerschaltkreis, Oszillatorschaltkreis und Verfahren zur Auffrischungssteuerung eines Halbleiterspeicherbauelements Refresh control circuitry, oscillator circuit and method for refresh control of a semiconductor memory device
11/09/2006	DE102006015971A1 Speicherelement mit adiabatischer Drehumschaltung und ferromagnetischer Entkopplungsschicht Memory element with adiabatic rotational switching and ferromagnetic decoupling layer
11/09/2006	DE102006015017A1 Leistungsdrosselungssystem und -Verfahren für eine Speichersteuerung Power reduction system and method for a memory controller
11/09/2006	DE102006011720A1 Speicher mit Datenzwischenspeicherschaltung, die einen Selektor umfasst Memory data latch circuit comprising a selector
11/09/2006	DE102006002521A1 Semiconductor chip signature identification circuit, has resistor connected to power supply voltage, and fuse connected in series with resistor, where fuse is connected in series with three transistors
11/08/2006	EP1720168A1 Integrated circuit device, flash memory array, nonvolatile memory device and operating method
11/08/2006	EP1719177A1 Layered crossbar memory connected to integrated circuit
11/08/2006	EP1719136A1 Non-switching pre-and post-disturb compensational pulses
11/08/2006	EP1719135A1 Magnetic memory with a magnetic tunnel junction written in a thermally assisted manner, and method for writing the same
11/08/2006	EP1719134A1 Perpendicular magnetization magnetic element utilizing spin transfer
11/08/2006	CN1858856A Signal processing circuits and methods, and memory systems
11/08/2006	CN1284244C Static semiconductor storage
11/07/2006	US7133998 Active memory processing array topography and method
11/07/2006	US7133996 Memory device and internal control method therefor
11/07/2006	US7133790 Method and system of calibrating the control delay time
11/07/2006	US7133324 Synchronous dynamic random access memory devices having dual data rate 1 (DDR1) and DDR2 modes of operation and methods of operating same
11/07/2006	US7133322 Probe storage device
11/07/2006	US7133318 Output driver capable of controlling slew rate of output signal according to operating frequency information or CAS latency information
11/07/2006	US7133313 Operation scheme with charge balancing for charge trapping non-volatile memory
11/07/2006	US7133312 Readout circuit for semiconductor memory device based on a number of pulses generated by a voltage-controlled oscillator
11/07/2006	US7133311 Low power, high speed read method for a multi-level cell DRAM
11/07/2006	US7133310 Thin film magnetic memory device having a highly integrated memory array
11/07/2006	US7133309 Method and structure for generating offset fields for use in MRAM devices
11/07/2006	US7133307 Resistive memory element sensing using averaging
11/07/2006	US7133306 Semiconductor memory device for securely retaining data
11/07/2006	US7133305 Semiconductor memory device
11/07/2006	US7133304 Method and apparatus to reduce storage node disturbance in ferroelectric memory
11/07/2006	US7133303 Dynamic type semiconductor memory apparatus
11/07/2006	US7132871 Data retaining circuit
11/07/2006	US7132713 Controllable conduction device with electrostatic barrier
11/07/2006	US7132675 Programmable conductor memory cell structure and method therefor
11/07/2006	US7132350 Method for manufacturing a programmable eraseless memory
11/07/2006	US7132341 Semiconductor integrated circuit device and the process of the same
11/07/2006	US7131715 Printhead chip that incorporates micro-mechanical lever mechanisms
11/02/2006	WO2006115275A1 Mram and method for writing in mram
11/02/2006	WO2006115075A1 Semiconductor integrated circuit
11/02/2006	WO2006115062A1 General-purpose logic module and circuit having the same
11/02/2006	US20060248258 Compensating a long read time of a memory device in data comparison and write operations
11/02/2006	US20060246653 High-performance one-transistor memory cell
11/02/2006	US20060245281 Memory controller and data processing system
11/02/2006	US20060245280 Integrated circuit having a non-volatile memory cell transistor as a fuse device
11/02/2006	US20060245263 Nonvolatile semiconductor memory
11/02/2006	US20060245261 Semiconductor integrated circuit device
11/02/2006	US20060245260 Flash memory device and program method thereof
11/02/2006	US20060245259 Semiconductor memory device
11/02/2006	US20060245258 Integrated power device having a start-up structure
11/02/2006	US20060245257 Multiple level programming in a non-volatile memory device
11/02/2006	US20060245256 Split gate flash memory cell with ballistic injection
11/02/2006	US20060245254 Nonvolatile semiconductor memory device
11/02/2006	US20060245244 High-performance one-transistor memory cell
11/02/2006	US20060245243 Multi-resistive state element with reactive metal
11/02/2006	US20060245242 Triple pulse method for mram toggle bit characterization
11/02/2006	US20060245241 Two terminal memory array having reference cells
11/02/2006	US20060245240 Method and apparatus for reducing time delay through static bitlines of a static memory
11/02/2006	US20060245239 Semiconductor integrated circuit
11/02/2006	US20060245238 Dynamic RAM storage techniques
11/02/2006	US20060245237 Application pre-launch to reduce user interface latency
11/02/2006	US20060245236 Memory device
11/02/2006	US20060245235 Design and operation of a resistance switching memory cell with diode
11/02/2006	US20060245234 Method of operating a complementary bit resistance memory sensor and method of operation
11/02/2006	US20060245227 Serial transistor-cell array architecture
11/02/2006	US20060245118 Control of MTJ tunnel area
11/02/2006	US20060244784 Printhead having inkjet actuators with contractible chambers
11/02/2006	US20060244707 Controller driver and display apparatus using the same
11/02/2006	US20060244099 Split-channel antifuse array architecture
11/02/2006	US20060244007 High-performance one-transistor memory cell
11/02/2006	US20060243956 Cross point memory array with fast access time
11/02/2006	EP1717862A2 Memory device and semiconductor device
11/02/2006	EP1717813A2 Dual loop sensing scheme for resistive memory elements
11/02/2006	EP1716600A1 Bipolar reading technique for a memory cell having an electrically floating body transistor
11/02/2006	EP1716561A2 Spin transfer magnetic element having low saturation magnetization free layers
11/02/2006	EP1636801B1 Multibit memory with dynamic reference voltage generation
11/02/2006	EP1516341B1 Self-calibrating sense amplifier strobe
11/02/2006	EP1502265B1 Ferroelectric memory
11/02/2006	DE102006012968A1 Verfahren zum Erhöhen einer Dateneinrichtungs- und Haltespanne im Fall von nicht symmetrischen PVT Method of increasing a Dateneinrichtungs- and hold margin in the case of non-symmetric PVT
11/02/2006	DE102005019041A1 Clock signal and strobe signal phase relationship adjusting method, for memory system, involves transmitting write data signal synchronized to strobe signal, and adjusting phase misalignment between transmitted clock and strobe signals
11/02/2006	DE102004046549B4 Schaltung zur Erzeugung einer hohen Spannung und nichtflüchtiges Halbleiterspeicherbauelement A circuit for generating a high voltage and a non-volatile semiconductor memory device
11/02/2006	DE10152102B4 Vorrichtung zum Detektieren von Eingangssignalflanken zur Signalverarbeitungsausführung auf der Basis von Flankenzeitsteuerungen An apparatus for detecting edges of the input signal to signal processing executed on the basis of edge timings
11/02/2006	DE10146185B4 Verfahren zum Betrieb eines Halbleiterspeichers und Halbleiterspeicher A method of operating a semiconductor memory and semiconductor memory
11/02/2006	DE10125800B4 Speicherbaustein mit einer Speicherzelle und Verfahren zur Herstellung eines Speicherbausteins Memory device having a memory cell and method for manufacturing a memory device
11/02/2006	DE10003812B4 Schaltung zum Ansteuern eines nichtflüchtigen ferroelektrischen Speichers Circuit for driving a non-volatile ferroelectric memory
11/01/2006	CN1856840A Erase inhibit in non-volatile memories
11/01/2006	CN1856839A Nonvolatile semiconductor memory device which uses some memory blocks in multilevel memory as binary memory blocks

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