Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2007
12/11/2007US7307888 Method and apparatus for operating nonvolatile memory in a parallel arrangement
12/11/2007US7307886 Nonvolatile memory device including circuit formed of thin film transistors
12/11/2007US7307884 Concurrent programming of non-volatile memory
12/11/2007US7307883 Non-volatile semiconductor memory device
12/11/2007US7307881 Non-volatile semiconductor memory with large erase blocks storing cycle counts
12/11/2007US7307880 One time programming memory cell using MOS device
12/11/2007US7307878 Flash memory device having improved program rate
12/11/2007US7307877 Natural analog or multilevel transistor DRAM-cell
12/11/2007US7307876 High speed low power annular magnetic devices based on current induced spin-momentum transfer
12/11/2007US7307875 Spin based magnetic sensor
12/11/2007US7307874 Methods of operating magnetic random access memory devices including magnets adjacent magnetic tunnel junction structures
12/11/2007US7307873 Memory with five-transistor bit cells and associated control circuit
12/11/2007US7307872 Nonvolatile semiconductor static random access memory device
12/11/2007US7307871 SRAM cell design with high resistor CMOS gate structure for soft error rate improvement
12/11/2007US7307870 Molecular memory devices and methods
12/11/2007US7307869 Method and circuit for reading a dynamic memory circuit
12/11/2007US7307868 Integrated circuit including memory cell for storing an information item and method
12/11/2007US7307867 Over-driven access method and device for ferroelectric memory
12/11/2007US7307866 Ferroelectric memory and method for reading data from the ferroelectric memory
12/11/2007US7307861 Content addressable memory (CAM) cell bit line architecture
12/11/2007US7307466 Potential detector and semiconductor integrated circuit
12/11/2007US7307451 Field programmable gate array device
12/11/2007US7307308 Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation
12/11/2007US7307302 Magneto-resistive effect element and magnetic memory
12/11/2007US7306984 Method of manufacture of a semiconductor integrated circuit device including a plurality of columnar laminates having different spacing in different directions
12/11/2007US7306954 Process flow for building MRAM structures
12/06/2007WO2007138991A1 Semiconductor device
12/06/2007WO2007138517A1 Array configuration for dram memory with double-gate floating-body finfet cells
12/06/2007WO2007117610A3 Methods for erasing memory devices and multi-level programming memory device
12/06/2007US20070281156 Nanoscale wires and related devices
12/06/2007US20070280031 Nand type flash memory
12/06/2007US20070280027 Memory device and method having banks of different sizes
12/06/2007US20070280025 Semiconductor memory device and semiconductor memory device control method
12/06/2007US20070280023 Phase change memory having temperature budget sensor
12/06/2007US20070280021 Sense amplifier
12/06/2007US20070280017 Nonvolatile Semiconductor Memory Device
12/06/2007US20070280005 Semiconductor storage device and semiconductor storage device driving method
12/06/2007US20070280004 Nonvolatile semiconductor memory device and method of testing thereof
12/06/2007US20070280003 Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method
12/06/2007US20070280001 Method for Programming and Erasing an Array of NMOS EEPROM Cells That Minimizes Bit Disturbances and Voltage Withstand Requirements for the Memory Array and Supporting Circuits
12/06/2007US20070280000 Method of writing data to a semiconductor memory device
12/06/2007US20070279999 Nonvolatile semiconductor memory device and method of operating the same which stably perform erase operation
12/06/2007US20070279998 Semiconductor device and semiconductor integrated circuit
12/06/2007US20070279997 Memory self-test circuit, semiconductor device and IC card including the same, and memory self-test method
12/06/2007US20070279995 System for performing data pattern sensitivity compensation using different voltage
12/06/2007US20070279994 Data pattern sensitivity compensation using different voltage
12/06/2007US20070279993 Verify operation for non-volatile storage using different voltages
12/06/2007US20070279992 Non-Volatile Memory And Method With Reduced Neighboring Field Errors
12/06/2007US20070279990 Nonvolatile memory having latching sense amplifier and method of operation
12/06/2007US20070279988 Apparatus and method for reduced peak power consumption during common operation of multi-NAND flash memory devices
12/06/2007US20070279987 Non-Volatile Memory Embedded In A Conventional Logic Process And Methods For Operating Same
12/06/2007US20070279986 Nonvolatile semiconductor memory
12/06/2007US20070279985 System for verifying non-volatile storage using different voltages
12/06/2007US20070279984 Nonvolatile Semiconductor Storing Device and Block Redundancy Saving Method
12/06/2007US20070279983 Semiconductor memory device and data transmission method thereof
12/06/2007US20070279982 Semiconductor memory device capable of correcting a read level properly
12/06/2007US20070279980 Reading method of a non-volatile electronic device and corresponding device
12/06/2007US20070279979 Semiconductor memory device
12/06/2007US20070279978 Magnetic random access memory using single crystal self-aligned diode
12/06/2007US20070279977 Semiconductor magnetic memory
12/06/2007US20070279976 Read, write, and erase circuit for programmable memory devices
12/06/2007US20070279975 Refreshing a phase change memory
12/06/2007US20070279974 Forming heaters for phase change memories with select devices
12/06/2007US20070279973 Magnetic memory
12/06/2007US20070279972 Memory
12/06/2007US20070279971 Modified pseudo-spin valve (psv) for memory applications
12/06/2007US20070279970 Nonvolatile memory with data clearing functionality
12/06/2007US20070279969 Intrusion detection apparatus and method
12/06/2007US20070279968 Method and system for providing a magnetic memory structure utilizing spin transfer
12/06/2007US20070279967 High density magnetic memory cell layout for spin transfer torque magnetic memories utilizing donut shaped transistors
12/06/2007US20070279966 8T SRAM cell with higher voltage on the read WL
12/06/2007US20070279965 Method and apparatus for avoiding cell data destruction caused by SRAM cell instability
12/06/2007US20070279964 SRAM split write control for a delay element
12/06/2007US20070279963 Semiconductor memory
12/06/2007US20070279962 High density memory array for low power application
12/06/2007US20070279961 Providing a reference voltage to a cross point memory array
12/06/2007US20070279960 Memory system and semiconductor integrated circuit
12/06/2007US20070279113 Dll Circuit
12/06/2007US20070279112 Semiconductor Memory
12/06/2007US20070279111 Dll Circuit
12/06/2007DE112005003380T5 Mehrpegel-ONO-Flash-Programmieralgorithmus zur Steuerung der Breite der Schwellwertverteilung Multi-level ONO flash programming algorithm for controlling the width of the threshold value distribution
12/06/2007DE102006024960A1 Signalverzögerungsschleife und Verfahren zum Einrasten einer Signalverzögerungsschleife Signal delay loop and method for latching a signal delay loop
12/06/2007DE102005000997B4 Integrierte Halbleiterschaltungen mit gestapelten Knotenkontaktstrukturen und Verfahren zum Herstellen solcher Vorrichtungen Integrated semiconductor circuits stacked with node contact structures and methods for making such devices
12/05/2007EP1863034A2 Magnetic memory device
12/05/2007EP1861854A1 Proton and heavy ion seu resistant sram
12/05/2007EP1776641A4 Method of increasing ddr memory bandwidth in ddr sdram modules
12/05/2007EP1461862A4 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
12/05/2007EP1104578B1 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
12/05/2007CN101084556A Non-volatile memory and method with improved sensing
12/05/2007CN101083300A Organic memory devices including organic material and fullerene layers and related methods
12/05/2007CN101083298A Resistor random access memory cell with reduced active area and reduced contact areas
12/05/2007CN101083227A Magnetic random access memory using single crystal self-aligned diode
12/05/2007CN101083135A On die thermal sensor of semiconductor memory device
12/05/2007CN100353529C Method of identifying logical information in a programming and erasing cell by on-side reading scheme
12/05/2007CN100353456C Semiconductor memory storage
12/05/2007CN100353336C Data transmission method and system
12/05/2007CN100353168C Sense amplifier with configurable voltage swing control
12/04/2007US7305516 Multi-port memory device with precharge control
12/04/2007US7304907 Memory circuit with automatic precharge function, and integrated circuit device with automatic internal command function
12/04/2007US7304893 Method of partial page fail bit detection in flash memory devices
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