Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
10/2007
10/23/2007US7286428 Offset compensated sensing for magnetic random access memory
10/23/2007US7286424 Semiconductor integrated circuit device
10/23/2007US7286422 Memory device with built-in test function and method for controlling the same
10/23/2007US7286421 Active compensation for operating point drift in MRAM write operation
10/23/2007US7286418 Internal voltage supply circuit
10/23/2007US7286414 Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
10/23/2007US7286404 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell
10/23/2007US7286402 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
10/23/2007US7286401 Nonvolatile semiconductor memory device
10/23/2007US7286399 Dedicated redundancy circuits for different operations in a flash memory device
10/23/2007US7286398 Semiconductor device and method of controlling said semiconductor device
10/23/2007US7286397 Clock synchronized nonvolatile memory device
10/23/2007US7286396 Bit line selection transistor layout structure
10/23/2007US7286395 Current driven switched magnetic storage cells having improved read and write margins and magnetic memories using such cells
10/23/2007US7286394 Non-volatile semiconductor memory device allowing concurrent data writing and data reading
10/23/2007US7286393 System and method for hardening MRAM bits
10/23/2007US7286392 Data retention indicator for magnetic memories
10/23/2007US7286391 Semiconductor memory device capable of controlling potential level of power supply line and/or ground line
10/23/2007US7286390 Memory cell and semiconductor integrated circuit device
10/23/2007US7286389 Low-power, p-channel enhancement-type metal-oxide semiconductor field-effect transistor (PMOSFET) SRAM cells
10/23/2007US7286387 Reducing the effect of write disturbs in polymer memories
10/23/2007US7286382 Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability
10/23/2007US7286378 Serial transistor-cell array architecture
10/23/2007US7285983 Programmable array logic circuit employing non-volatile ferromagnetic memory cells
10/23/2007US7285836 Magnetic random access memory with stacked memory cells having oppositely-directed hard-axis biasing
10/23/2007US7285815 EEPROM device having selecting transistors and method of fabricating the same
10/23/2007US7285810 Ferroelectric memory devices having expanded plate lines
10/23/2007US7285467 Methods of fabricating static random access memories (SRAMS) having vertical transistors
10/23/2007US7285464 Nonvolatile memory cell comprising a reduced height vertical diode
10/23/2007US7284843 Ink distribution assembly for an ink jet printhead
10/23/2007US7284837 Fluid ejection device with micro-electromechanical fluid ejection actuators
10/23/2007US7284315 Method of forming a magnetic tunnel junction
10/18/2007WO2007116827A1 Semiconductor storage device
10/18/2007WO2007116486A1 Memory apparatus, control method thereof, control program thereof, memory card, circuit board and electronic device
10/18/2007WO2007116485A1 Memory device, its interface circuit, memory system, memory card, circuit board, and electronic device
10/18/2007WO2007116484A1 Memory apparatus, interface circuit thereof, control method thereof, control program thereof, memory card, circuit board, and electronic device
10/18/2007WO2007116483A1 Memory apparatus, its control method, its control program, memory card, circuit board, and electronic device
10/18/2007WO2007116439A1 Semiconductor memory and memory system
10/18/2007WO2007116393A2 Method for generating soft bits in flash memories
10/18/2007WO2007115509A1 A magnetic logic element with toroidal multiple magnetic films and a method of logic treatment using the same
10/18/2007US20070242544 Method and system for providing directed bank refresh for volatile memories
10/18/2007US20070242535 Semiconductor memory device and defect remedying method thereof
10/18/2007US20070242532 Integrated Circuit Memory Device Having Delayed Write Timing Based on Read Response Time
10/18/2007US20070242525 Method for erasing flash memories and related system thereof
10/18/2007US20070242524 Reducing the impact of program disturb
10/18/2007US20070242520 Voltage regulator having a low noise discharge switch for non-volatile memories, in particular for discharging word lines from negative voltages
10/18/2007US20070242518 Method for programming a block of memory cells, non-volatile memory device and memory card device
10/18/2007US20070242514 NAND-structured nonvolatile memory cell
10/18/2007US20070242511 Nand memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same
10/18/2007US20070242509 Apparatus for reducing the impact of program disturb during read
10/18/2007US20070242508 Low power balance code using data bus inversion
10/18/2007US20070242507 Determining history state of data in data retaining device based on state of partially depleted silicon-on-insulator
10/18/2007US20070242506 Semiconductor memory device storing redundant replacement information with small occupation area
10/18/2007US20070242505 Magnetic memory device and method for driving the same
10/18/2007US20070242503 Phase change memory device using multiprogramming method
10/18/2007US20070242502 Memory element and memory
10/18/2007US20070242501 Structure and access method for magnetic memory cell and circuit of magnetic memory
10/18/2007US20070242500 Method and apparatus providing high density data storage
10/18/2007US20070242499 Semiconductor integrated circuit device and trimming method of semiconductor integrated circuit device
10/18/2007US20070242498 Sub-threshold static random access memory
10/18/2007US20070242497 Dynamic control of back gate bias in a FinFET SRAM cell
10/18/2007US20070242496 NOR and NAND Memory Arrangement of Resistive Memory Elements
10/18/2007US20070242103 Inkjet Nozzle Arrangement With Thermal Bend Actuator Capable Of Differential Thermal Expansion
10/18/2007US20070241747 Multiple SQUID magnetometer
10/18/2007US20070241382 Semiconductor integrated circuit device and process for manufacturing the same
10/18/2007DE19962509B4 Bitleitungsleseverstärker für eine Halbleiterspeicher-Vorrichtung Bit line sense amplifier for a semiconductor memory device
10/18/2007DE19750927B4 Verfahren zum kontinuierlichen Auslesen einer Datenfolge aus einem Speicher A method for continuously reading out a data string from a storage
10/18/2007DE102007007854A1 Verfahren und Vorrichtung für einen Oszillator in einem Speicherbaustein Method and apparatus for an oscillator in a memory module
10/17/2007EP1844473A1 Radiation-hardened sram cell with write error protection
10/17/2007EP1844472A1 Magnetic memory system using mram-sensor
10/17/2007EP1844471A1 Magnetic rom information carrier with additional stabilizing layer
10/17/2007EP1844470A1 Magnetic memory composition and method of manufacture
10/17/2007EP1730747A4 Rewriteable electronic fuses
10/17/2007EP1690261B1 Method and device for preventing erroneous programming of a magnetoresistive memory element
10/17/2007EP1623431A4 A non-volatile memory having a bias on the source electrode for hci programming
10/17/2007EP1518244B1 Wordline latching in semiconductor memories
10/17/2007EP1495471B1 System and method for generating a reference voltage based on averaging the voltages of two complementary programmed dual bit reference cells
10/17/2007EP1221165B1 Circuit and method for a multiplexed redundancy scheme in a memory device
10/17/2007CN101057299A Concurrent programming of non-volatile memory
10/17/2007CN101055915A Logic part and magnetic logic part array based on the dual potential base magnetic tunnel junction
10/17/2007CN101055762A Semiconductor storage device, and control method and test method of semiconductor storage device
10/17/2007CN101055761A Semiconductor storage device, and control method and test method of semiconductor storage device
10/17/2007CN101055760A Self refresh operation of semiconductor memory device
10/17/2007CN100344008C Magnetic funnel node device and storage array
10/17/2007CN100343993C 半导体存储器 Semiconductor memory
10/17/2007CN100343976C Method for fabricating ferroelectric random access memory device
10/17/2007CN100343919C System structure of high spped magnetic storage
10/17/2007CN100343901C Method and apparatus for testing tunnel magnetoresistive effect element
10/16/2007US7283419 Integrated semiconductor memory
10/16/2007US7283413 Sense amplifier and method for generating variable reference level
10/16/2007US7283408 Nonvolatile memory apparatus enabling data to be replaced prior to supplying read data and prior to supplying write data
10/16/2007US7283407 Semiconductor memory device
10/16/2007US7283405 Semiconductor memory device and signal processing system
10/16/2007US7283403 Memory device and method for simultaneously programming and/or reading memory cells on different levels
10/16/2007US7283402 Methods and systems for high write performance in multi-bit flash memory devices
10/16/2007US7283400 Nonvolatile semiconductor storage device
10/16/2007US7283399 Nonvolatile memory system, semiconductor memory, and writing method
10/16/2007US7283397 Flash EEprom system capable of selective erasing and parallel programming/verifying memory cell blocks
10/16/2007US7283393 NAND flash memory device and method of fabricating the same
10/16/2007US7283390 Hybrid non-volatile memory
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