Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
12/2004
12/09/2004US20040246151 Methods and systems for data manipulation
12/09/2004DE10332449A1 FIFO or first-in first-out shift register has a circuit arrangement with register elements each having a memory element of a masking memory for storage of first and second validity information
12/08/2004EP1483871A2 Accessory control interface
12/08/2004EP1384140B1 Method and device for adapting the data rate of a data stream
12/08/2004CN1179268C Method and device for stabilizing image in display device
12/02/2004US20040243965 Implementing method for buffering devices
12/02/2004US20040243961 Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip
12/02/2004US20040243877 Data processing device and mobile device
12/02/2004US20040243876 Method and apparatus for enhancing the speed of a synchronous bus
12/02/2004US20040243743 History FIFO with bypass
12/02/2004US20040240482 Method and system for dynamic FIFO flow control
12/02/2004US20040240435 Obtaining a destination address so that a network interface device can write network data without headers directly into host memory
12/02/2004US20040239703 Expanding computer display advertising method and system
12/02/2004US20040239400 Integrated circuit and method for operating the integrated circuit
12/01/2004EP1482402A2 Fill level capture in a buffer
12/01/2004EP1481317A2 Shared queue for multiple input-streams
12/01/2004EP1410158B1 Power controlled electronic circuit
12/01/2004CN1552016A Apparatus and method for extracting and loading data to/from a buffer
12/01/2004CN1552013A Electronic circuit with energy control
12/01/2004CN1551005A Method and system for optimized fifo full condition control
12/01/2004CN1550991A Method and system for dynamic controlling fifo internal memory accessing flowchart
11/2004
11/30/2004US6826728 Collectively designating and installing font types and unicode based languages
11/30/2004US6826637 Implementing for buffering devices in circuit layout to ensure same arriving time for clock signal from source root to output bonding pads
11/30/2004US6826573 Method and apparatus for queue issue pointer
11/30/2004US6826243 Circuit arrangement for the processing of binary signals
11/30/2004CA2106271C Single and multistage stage fifo designs for data transfer synchronizers
11/25/2004WO2004102555A1 Method for setting data carrier speed in a data carrier drive apparatus
11/25/2004US20040236979 Method and apparatus for an integrated circuit having flexible-ratio frequency domain cross-overs
11/25/2004US20040236900 Method and apparatus for storing multiple entry types and ordering information using a single addressable storage array
11/25/2004US20040236879 Handling interrupts in a system having multiple data processing units
11/24/2004EP1479168A1 Method and apparatus for analog and digital signal and data compression
11/24/2004CN1549963A Buffer system with sequential and non-sequential block access
11/24/2004CN1549106A Apparatus for performing multiply-add operations on packed data
11/24/2004CN1549105A Method for realizing AES algorithm by serial hardware in intelligent card
11/23/2004US6823467 Method and apparatus for arbitrary resolution interval timeouts
11/23/2004US6823085 Image data compression and reconstruction apparatus and method and storage medium thereof
11/23/2004US6822586 Apparatus and method for converting binary numbers to character codes
11/18/2004US20040230765 Data sharing apparatus and processor for sharing data between processors of different endianness
11/18/2004US20040230723 Device for transferring data between two asynchronous subsystems having a buffer memory
11/18/2004US20040230715 Method and system for optimized FIFO full condition control
11/18/2004US20040230632 Computationally efficient mathematical engine
11/17/2004WO2004107198A1 Mechanism for applying transorms to multi-part files
11/17/2004EP1476812A1 Pipelined parallel programming operation in a non-volatile memory system
11/17/2004EP1163569B1 Method and circuit for receiving dual edge clocked data
11/16/2004US6820172 Method, system, and program for processing input/output (I/O) requests to a storage space having a plurality of storage devices
11/16/2004US6820024 System and method for calibrating control unit
11/16/2004US6819971 Fast computation of overflow flag in a bit manipulation unit
11/16/2004US6819732 Asynchronous sample rate estimation using reciprocal frequency error minimization
11/16/2004US6819627 Method for storing data, method for reading data, apparatus for storing data and apparatus for reading data
11/11/2004US20040225779 Programmable CPU/interface buffer structure using dual port RAM
11/11/2004US20040225765 Systems and methods for increasing transaction entries in a hardware queue
11/11/2004US20040223516 System and method for effectuating the transfer of data blocks across a clock boundary
11/10/2004EP1236278A4 Method and apparatus for an n-nary logic circuit
11/04/2004WO2004095460A2 Asynchronous jitter reduction technique
11/04/2004US20040220949 Method of rotating data in a plurality of processing elements
11/04/2004US20040218789 Fingerprint reader using surface acoustic wave device
11/04/2004US20040218425 Method and circuit for elastic storing capable of adapting to high-speed data communications
11/04/2004CA2520139A1 Asynchronous jitter reduction technique
11/02/2004US6813706 Data processing system and multiprocessor system
11/02/2004US6813655 Disk control apparatus
10/2004
10/28/2004WO2004092945A2 Data processing in which concurrently executed processes communicate via a fifo buffer
10/28/2004US20040215848 Apparatus, system and method for implementing a generalized queue pair in a system area network
10/28/2004US20040215647 Processing fixed-format data in a unicode environment
10/27/2004CN1540502A Improved dial chart
10/27/2004CN1540494A Threading metod for processing data packets based on FIFO queue and device of
10/26/2004US6810475 Processor with pipeline conflict resolution using distributed arbitration and shadow registers
10/26/2004US6810468 Asynchronous FIFO circuit and method of reading and writing data through asynchronous FIFO circuit
10/26/2004US6810098 FIFO read interface protocol
10/26/2004US6809984 Multiport memory circuit composed of 1Tr-1C memory cells
10/24/2004CA2426496A1 Processing fixed-format data in a unicode environment
10/21/2004US20040210687 Network for decreasing transmit link layer core speed
10/21/2004US20040210684 Method and device for adapting the data rate of a date stream
10/21/2004US20040210610 Method and apparatus for aligning operands for a processor
10/21/2004US20040207547 Method of scalable gray coding
10/19/2004US6807640 Programmable interface controller suitable for spanning clock domains
10/19/2004US6807615 Apparatus and method for providing a cyclic buffer using logical blocks
10/19/2004US6807589 Multirate circular buffer and method of operating the same
10/14/2004WO2004088486A1 Lookup table device and signal conversion method
10/14/2004US20040204929 Endian transformation
10/14/2004US20040202376 Reversible DCT for lossless-lossy compression
10/13/2004CN1537273A Safe application distribution and execution in wireless environment
10/12/2004US6804769 Unified buffer for tracking disparate long-latency operations in a microprocessor
10/12/2004US6804692 Method and apparatus for reassembly of data blocks within a network processor
10/07/2004US20040199672 System and method for high speed handshaking
10/07/2004US20040199561 Partitioned shifter for single instruction stream multiple data stream (SIMD) operations
10/07/2004US20040196286 Progressive scale graph
10/06/2004EP1465114A2 Progressive scale graph
10/06/2004EP0770292B1 Two stage clock dejitter circuit for regenerating an e4 telecommunications signal from the data component of an sts-3c signal
10/06/2004CN1534458A Method and device capable of using grouping data cmmand to execute fast conversion operation
10/06/2004CN1534453A Command set operated on pocket data
10/05/2004US6802059 Transforming character strings that are contained in a unit of computer program code
10/05/2004US6802036 High-speed first-in-first-out buffer
10/05/2004US6801991 Method and apparatus for buffer partitioning without loss of data
10/05/2004US6801965 Audio buffer station allocation
10/05/2004US6801143 Method and apparatus for generating gray code for any even count value to enable efficient pointer exchange mechanisms in asynchronous FIFO'S
10/05/2004CA2263453C A lempel-ziv data compression technique utilizing a dictionary pre-filled with frequent letter combinations, words and/or phrases
09/2004
09/30/2004US20040193931 System and method for transferring data from a first clock domain to a second clock domain
09/30/2004US20040193811 Shared receive queues
09/30/2004US20040193805 Fifo memory devices having multi-port cache and extended capacity memory devices therein with retransmit capability
09/30/2004US20040189686 Method and system for producing a model from optical images
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