Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
05/2005
05/18/2005CN1618066A System and method for processing extensible markup language (xml) documents
05/18/2005CN1202469C High speed floating point addition and subtraction part capable of direct matching exponents and needing no calculating exponential difference
05/17/2005US6895542 Data recovery circuit and method and data receiving system using the same
05/17/2005US6895495 Next available buffer allocation circuit
05/17/2005US6895424 Method and circuit for alignment of floating point significants in a SIMD array MPP
05/17/2005US6895420 Apparatus and method for sharing data FET for a four-way multiplexer
05/12/2005US20050102450 Apparatus and method for initializing an elastic buffer
05/11/2005EP1530178A1 Intelligent switch with touch sensor
05/11/2005CN1615477A Mechanism for use of conversion in multiple files
05/11/2005CN1201547C Data transmission device used in system possessing multiple clock ranges
05/11/2005CN1201238C Data processing apparatus with circuit for determining serial transismsion data proper characteristic
05/10/2005US6892292 Apparatus for one-cycle decompression of compressed data and methods of operation thereof
05/10/2005US6892253 Maintaining remote queue using two counters in transfer controller with hub and ports
05/10/2005US6891915 Calculating circuit for dividing a fixed-point signal
05/10/2005US6891863 Device and methods for processing channels in a data stream
05/10/2005US6891762 Buffer memory device
05/04/2005EP1446887A4 Method of transferring data
05/03/2005US6889270 Efficient reading of a remote first-in first-out buffer
05/03/2005US6889269 Non-blocking concurrent queues with direct node access by threads
05/03/2005US6889240 Data processing device having a central processing unit and digital signal processing unit
04/2005
04/28/2005WO2005039123A1 Method and equipment for performing aggregate-portion-specific flow shaping in packet-switched telecommunications
04/28/2005WO2005039122A1 Method and equipment for controlling the congestion management and scheduling of transmission-link capacity in packet-switched telecommunications
04/28/2005US20050091470 Calculation of gray codes using exhaustive combinations
04/28/2005US20050091429 System and method for designing data structures
04/28/2005US20050091421 Integrated circuit and information processing apparatus
04/27/2005CN1609782A Method and apparatus for regulating non-deterministic length information
04/26/2005US6886057 Method and system for supporting multiple bus protocols on a set of wirelines
04/26/2005US6885594 Method and circuit for elastic storing capable of adapting to high-speed data communications
04/26/2005US6885217 Data transfer control circuitry including FIFO buffers
04/21/2005WO2005013639A3 Buffer management system, digital audio receiver, headphones, loudspeaker, method of buffer management
04/21/2005US20050086400 FIFO interface for flag-initiated DMA frame synchro-burst operation
04/21/2005US20050086315 Viewing attachments to electronic communications via pushing the attachment to a networked viewing site
04/21/2005US20050086279 Methods and apparatus for performing multi-value range checks
04/20/2005CN1198214C Method of access arbitrary bit range data between different platforms
04/19/2005US6883040 Multi-function apparatus and method for receiving and printing electronic letter
04/19/2005US6882695 Data transmission line used continuously connected in plurality of stages in asynchronous system
04/19/2005US6882192 High-speed data buffer
04/14/2005US20050081003 Apparatus and method for efficient data storage in a digital logic device
04/14/2005US20050080755 System for getting conversion rules
04/14/2005US20050080610 Dynamic FIFO for simulation
04/14/2005US20050080598 Consistency checking mechanism for configuration parameters in embedded systems
04/14/2005CA2540078A1 A method of operating a computer network
04/12/2005US6880050 Storage device, system and method which can use tag bits to synchronize queuing between two clock domains, and detect valid entries within the storage device
04/12/2005US6879181 Methods and apparatuses for signal line termination
04/12/2005CA2366898C Elastic interface apparatus and method therefor
04/07/2005US20050076394 System and method to remotely manage and audit set top box resources
04/07/2005US20050073877 Data transfer control device and electronic instrument
04/07/2005DE10342255A1 Schaltung zur Ansteuerung eines Speichers Circuit for driving a memory
04/06/2005EP1323026A4 Method and apparatus for flexible data types
04/06/2005CN1604082A Mapping architecture for arbitrary data models
04/05/2005US6877051 Consistency checking mechanism for configuration parameters in embedded systems
04/05/2005US6877019 Barrel shifter
04/05/2005US6876774 Method and apparatus for compressing data string
03/2005
03/31/2005WO2005029342A1 Electronic ink processing
03/31/2005US20050071800 Mixed hardware/sofware architecture and method for processing xDSL communications
03/30/2005EP1519266A2 Mapping architecture for arbitrary data models
03/30/2005EP1518161A1 Method and apparatus for the dynamic scheduling of device commands
03/30/2005CN1195276C Method and device for maintenance of chained list
03/29/2005US6874097 Timing skew compensation technique for parallel data channels
03/29/2005US6874064 FIFO memory devices having multi-port cache and extended capacity memory devices therein with retransmit capability
03/29/2005US6874043 Data buffer
03/29/2005US6873334 Method of buffer management and task scheduling for two-dimensional data transforming
03/29/2005US6873184 Circular buffer using grouping for find first function
03/29/2005US6873180 Multi-access FIFO queue
03/24/2005WO2004109523A3 Method and apparatus for enhancing the speed of a synchronous bus
03/24/2005US20050066082 Non-blocking concurrent queues with direct node access by threads
03/24/2005US20050063502 Apparatus and method for generating a distributed clock signal
03/24/2005CA2759064A1 Intellegent data storage and processing using fpga devices
03/23/2005EP1516242A2 Fifo-register
03/23/2005CN1194334C Performing information recording device, compression device, decoding device and telephone terminal device
03/22/2005US6871320 Data compressing apparatus, reconstructing apparatus, and method for separating tag information from a character train stream of a structured document and performing a coding and reconstruction
03/22/2005US6871257 Pipelined parallel programming operation in a non-volatile memory system
03/22/2005US6871256 Method and arrangement in a stack having a memory segmented into data groups having a plurality of elements
03/17/2005WO2005024624A1 Circuit for addressing a memory
03/17/2005WO2005024542A2 Digital signal processing device
03/17/2005US20050060594 Bus clock frequency management based on device load
03/17/2005US20050058148 Elasticity buffer for streaming data
03/17/2005CA2537549A1 Digital signal processing device
03/16/2005EP1514172A2 Spacecake coprocessor communication
03/10/2005WO2005006195A3 System and method for selectively affecting data flow to or from a memory device
03/10/2005US20050055657 Integrated circuit development system
03/10/2005US20050055489 Bridge circuit for use in retiming in a semiconductor integrated circuit
03/10/2005US20050053283 Electronic ink processing
03/09/2005EP1512227A1 Packing and unpacking of a variable number of bits
03/09/2005CN1591316A Synchronous periodical orthogonal data converter
03/08/2005US6865654 Device for interfacing asynchronous data using first-in-first-out
03/08/2005US6865652 FIFO with undo-push capability
03/03/2005WO2005020062A1 Dynamic memory buffer
03/03/2005US20050050068 Mapping architecture for arbitrary data models
03/02/2005CN1589531A Method of transferring data
03/01/2005US6862673 Command order maintenance scheme for multi-in/multi-out FIFO in multi-threaded I/O links
03/01/2005US6862646 Method and apparatus for eliminating the software generated ready-signal to hardware devices that are not part of the memory coherency domain
03/01/2005US6862555 Enhanced preventative maintenance system and method of use
02/2005
02/24/2005US20050044286 Device for controlling endpoints of USB device and method of controlling endpoints of USB device
02/24/2005US20050041810 Shift device and method for shifting
02/24/2005US20050041450 FIFO memory devices having write and read control circuits that support x4N, x2N and xN data widths during DDR and SDR modes of operation
02/24/2005US20050041265 Data processing apparatus and data processing method
02/24/2005DE10128396B4 Verfahren und Schaltungsanordnung zum Übertragen von Daten von ein mit einem ersten Takt betriebenes System an ein mit einem zweiten Takt betriebenes System Method and circuit arrangement for transmitting data from a run with a first clock system to a run with a second clock system
02/23/2005CN1585924A Efficient FIFO communication using semaphores
02/23/2005CN1585923A P- and V-semaphore operation
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