Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
03/2007
03/13/2007US7191264 Disk control apparatus
03/13/2007US7191202 Comparator unit for comparing values of floating point operands
03/13/2007US7191162 FIFO interface for flag-initiated DMA frame synchro-burst operation
03/07/2007EP1759485A2 A method and system for securing a device
03/07/2007CN1926799A Circuit comprising mutually asynchronous circuit modules
03/06/2007US7188268 Method and apparatus for synchronous loading and out-of-phase unloading of data registers
03/06/2007US7188267 Semiconductor device having a first clock signal configured to operate sychronously with a second clock signal by use of a measuring and setting circuit
03/06/2007US7188115 Processing fixed-format data in a unicode environment
03/06/2007US7187741 Clock domain crossing FIFO
02/2007
02/28/2007CN1921726A Touch sensor and location indicator circuits
02/27/2007US7185331 Method and apparatus for downloading executable code in a non-disruptive manner
02/27/2007US7185220 Information exchange between locally synchronous circuits
02/27/2007US7185125 Device for transferring data via write or read pointers between two asynchronous subsystems having a buffer memory and plurality of shadow registers
02/27/2007US7184162 Information processing methodology
02/21/2007EP1518161A4 Method and apparatus for the dynamic scheduling of device commands
02/21/2007CN1918541A A fifo memory device with non-volatile storage stage
02/20/2007US7181639 Method and apparatus for controlling the flow of data between two circuits by generating one or more phase shifted clock signals
02/20/2007US7181638 Method and apparatus for skewing data with respect to command on a DDR interface
02/20/2007US7181561 Ordering rule controlled command storage
02/20/2007US7181292 System control method, control processing system, and control processing apparatus
02/15/2007WO2007017857A1 Accelerated computer recovery
02/15/2007WO2006113570A3 Ring management
02/15/2007US20070038788 Consistency checking mechanism for configuration parameters in embedded systems
02/15/2007DE69932481T2 Kellerzeigerverwaltung Keller pointer management
02/13/2007US7178168 Shift device and method for shifting
02/13/2007US7178047 Method to reduce or eliminate audio interference from computer components
02/13/2007US7177970 Bus control system
02/08/2007US20070033306 FIFO-type one-way interfacing device between a master unit and a slave unit, and corresponding master unit and slave unit
02/08/2007US20070033305 Method or apparatus for transferring data
02/08/2007US20070033152 Digital signal processing device
02/06/2007US7174525 Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip
02/06/2007US7174358 System, method, and apparatus for division coupled with truncation of signed binary numbers
02/06/2007US7172116 Automatic dispensing machine of cards and card like goods
02/01/2007WO2007013044A1 Data stream synchronization
02/01/2007US20070028017 Method and Apparatus for Generating Unique Identification Numbers for PCI Express Transactions with Substantially Increased Performance
02/01/2007US20070028016 Message processing system and method using external storage
02/01/2007US20070028015 System and method for processing data streams
01/2007
01/31/2007EP1748355A1 FIFO-type unidirectional interfacing device between a master block and a slave block, corresponding master block and slave block
01/31/2007CN1298150C Method for processing consistent data sets
01/30/2007US7170800 Low-power delay buffer circuit
01/25/2007WO2007011525A1 Hardware assisted receive channel frame handling via data offset comparison in sas ssp wide port applications
01/25/2007US20070022231 Method and System for Transferring a Stream of Data
01/25/2007US20070022230 Spread spectrum receiver, apparatus and method of a circular buffer for multirate data
01/24/2007CN1902580A Electronic circuit with a FIFO pipeline
01/24/2007CN1296814C Circuit and method for calibrating data transmission time sequence of multiple data channels
01/24/2007CN1296813C Floating-point storage method and floating-point arithmetic device
01/23/2007US7167997 Apparatus and method for limiting data transmission rates
01/23/2007US7167935 Accessory control interface
01/23/2007US7167929 Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves that may be incorporated within disk arrays, and a storage-shelf-interface tunneling method and system
01/23/2007US7167024 Methods and circuitry for implementing first-in first-out structure
01/18/2007US20070016700 Integrated circuit device and electronic instrument
01/17/2007CN1295629C Method and system for optimized fifo full condition control
01/16/2007US7165140 Queuing architecture including a plurality of queues and associated method for controlling admission for disk access requests for video content
01/16/2007US7165085 Arithmetic circuits for use with the residue number system
01/16/2007US7165013 Scuba diver electronic assistant
01/11/2007WO2007005330A2 Systems and methods for weighted overlap and add processing
01/11/2007US20070011368 Digital phase relationship lock loop
01/11/2007US20070011365 Electric field device
01/11/2007US20070008984 Buffer management system, digital audio receiver, headphones, loudspeaker, method of buffer management
01/11/2007US20070008764 Circuit for addressing a memory
01/11/2007CA2614120A1 Elliptic curve point multiplication
01/10/2007EP1742146A1 Adaptation of the bit rate in a data-processing flow
01/10/2007CN1892591A Data alignment between native and non-native shared data structures
01/10/2007CN1892589A Apparatus for controlling site adjustment of shift grouped data
01/09/2007US7162691 Methods and apparatus for indexing and searching of multi-media web pages
01/09/2007US7162612 Mechanism in a microprocessor for executing native instructions directly from memory
01/09/2007US7162569 Pipelined parallel programming operation in a non-volatile memory system
01/09/2007US7161999 Synchronizing data or signal transfer across clocked logic domains
01/09/2007US7161849 First-in, first-out buffer system in an integrated circuit
01/04/2007WO2007002922A1 Frame order processing apparatus, systems, and methods
01/04/2007US20070005834 Memory chips with buffer circuitry
01/04/2007US20070005833 Transmit buffers in connection-oriented interface
01/04/2007US20070005832 Frame order processing apparatus, systems, and methods
01/04/2007US20070005831 Semiconductor memory system
01/04/2007US20070005830 Systems and methods for weighted overlap and add processing
01/04/2007US20070005828 Interrupts support for the KCS manageability interface
01/03/2007CN1890627A Buffer management via non-data symbol processing for a point to point link
01/02/2007US7158440 FIFO memory devices having write and read control circuits that support x4N, x2N and xN data widths during DDR and SDR modes of operation
12/2006
12/28/2006US20060294267 Method for setting data carrier speed in a data carrier drive apparatus
12/26/2006US7154984 FIFO-register and digital signal processor comprising a FIFO-register
12/21/2006US20060288135 Data distribution method and system
12/21/2006US20060288134 Data streamer
12/21/2006US20060287958 Safe application distribution and execution in a wireless environment
12/21/2006DE102005004941B4 Konvertierung von Daten, insbesondere zur Wiedergabe von Audio- und/oder Videoinformationen Conversion of data, in particular for reproducing audio and / or video information
12/14/2006US20060282813 Development system for an integrated circuit having standardized hardware objects
12/14/2006US20060282812 Communication network for multi-element integrated circuit system
12/14/2006US20060282569 Display device
12/14/2006US20060282568 Interface apparatus, video processing apparatus and data communication method
12/14/2006US20060282567 Status indicators for universal serial bus (USB) ports
12/14/2006US20060282566 Flow control for media streaming
12/13/2006EP1732241A1 System and method of conveying data in an electronic circuit
12/13/2006EP1442550B1 Clock domain crossing fifo
12/13/2006EP1080432B1 Data acquisition system comprising means for analysing and storing in real time
12/13/2006CN1290025C Receiving method
12/12/2006US7149932 Serial communication device and method of carrying out serial communication
12/12/2006US7149765 Apparatus and method for precision binary numbers and numerical operations
12/12/2006US7148826 Data input circuit and semiconductor device utilizing data input circuit
12/12/2006CA2302020C Interface circuit for full-custom and semi-custom clock domains
12/06/2006EP1729422A2 Hardware implementation of a compression algorithm
12/06/2006EP1546858A4 Apparatus and method for dynamic program decompression
1 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 ... 82