Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
06/2007
06/19/2007US7234007 Adjustable elasticity FIFO buffer have a number of storage cells equal to a frequency offset times a number of data units in a data stream
06/19/2007US7232061 Portable device, IC module, IC card, and method for using services
06/14/2007US20070133399 Data processing in which concurrently executed processes communicate via a fifo buffer
06/12/2007US7231471 System using fairness logic for mediating between traffic associated with transit and transmit buffers based on threshold values of transit buffer
06/12/2007US7231453 Temporal drift correction
06/12/2007US7231340 Dynamic memory buffer
06/07/2007WO2007064127A1 Grid computing system for testing application program capacity of server
06/07/2007WO2007063858A1 Buffer control device and buffer memory
06/07/2007US20070130395 Bus processing apparatus
06/07/2007US20070130394 Self-synchronizing hardware/software interface for multimedia SOC design
06/07/2007US20070130392 Deadlock Avoidance in a Bus Fabric
06/07/2007US20070130391 Storage device, control method thereof and program
06/07/2007US20070130390 Method and apparatus for effective package memory bandwidth management
06/07/2007US20070130389 Arrangement and method for determining charging in a telecommunications system
06/06/2007CN1320769C Coder, decoder and data transfer systems
06/06/2007CN1320442C Audio processing circuit and related method
06/05/2007US7228374 Data transmission system for connecting a controller with drives
06/05/2007US7228347 Image processing device and image processing method
06/05/2007US7228324 Circuit for selectively providing maximum or minimum of a pair of floating point operands
05/2007
05/31/2007WO2007059645A1 Signal transition feature based coding for serial link
05/31/2007WO2007030413A9 Vxml browser control channel
05/31/2007WO2005111813A3 Semantic processor storage server architecture
05/31/2007US20070124623 Circuit and method for aligning data transmitting timing of a plurality of lanes
05/29/2007US7225354 Circuit and method for aligning transmitted data by adjusting transmission timing for a plurality of lanes
05/23/2007CN1967467A Spread spectrum receiver, apparatus and method of a circular buffer for multirate data
05/22/2007US7222254 System and method for over-clocking detection of a processor utilizing a feedback clock rate setting
05/22/2007US7222199 Circuit and method for transferring low frequency signals via high frequency interface
05/18/2007WO2006052933A3 Memory controller-adaptive 1t/2t timing control
05/17/2007US20070113214 Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip
05/17/2007US20070113049 Electronic circuit with a fifo pipeline
05/16/2007EP1029266B1 METHOD AND APPARATUS FOR EFFICIENT SYNCHRONOUS MIMD OPERATIONS WITH iVLIW PE-to-PE COMMUNICATION
05/16/2007CN1964851A Data processing method, data processing apparatus, mask generation method, and mask pattern
05/15/2007US7219251 Programmable clock synchronizer
05/15/2007US7219193 FIFO control circuit
05/15/2007US7219183 Switching apparatus and method for providing shared I/O within a load-store fabric
05/15/2007US7219127 Control unit operations in a real-time collaboration server
05/10/2007US20070106832 Bus control system
05/09/2007CN1959661A Bus interface devices and method
05/09/2007CN1315040C Logic reorganizable circuit
05/08/2007US7216185 Buffering apparatus and buffering method
05/03/2007WO2006086379A3 Command-coalescing raid controller
05/03/2007US20070101028 Serial data input system
05/03/2007US20070101026 Bus controller and data buffer space configuration method of the same
05/01/2007US7213087 Mechanism to control the allocation of an N-source shared buffer
05/01/2007US7213086 System having a storage controller that modifies operation of a storage system based on the status of a data transfer
05/01/2007US7213085 Use of a media cache for subsequent copying acceleration
05/01/2007US7212599 Jitter and wander reduction apparatus
05/01/2007US7212598 Data buffer-controlled digital clock regenerator
04/2007
04/26/2007WO2006138250A3 Virtual networks in a communication system architecture
04/26/2007US20070094656 Self-modifying copier for downloading executable code in a non-disruptive manner
04/26/2007US20070091680 Pipelined Parallel Programming Operation in a Non-Volatile Memory System
04/26/2007CA2626684A1 Pointer computation method and system for a scalable, programmable circular buffer
04/25/2007EP1121631B1 Reshuffled communications processes in pipelined asynchronous circuits
04/24/2007US7210056 Low latency comma detection and clock alignment
04/24/2007US7209983 Sequential flow-control and FIFO memory devices that are depth expandable in standard mode operation
04/24/2007CA2445300C Method for compressing/decompressing a structured document
04/19/2007WO2007042948A1 Device and method for managing a retransmit operation
04/19/2007WO2007042864A1 Device and method for managing a retransmit operation
04/19/2007WO2006071817A3 Intelligent storage engine for disk drive operations with reduced local bus traffic
04/19/2007US20070088872 Configurable architecture for virtual socket client to an on-chip bus interface block
04/17/2007US7206960 Bus clock frequency management based on device load
04/17/2007US7206871 Extending circuit for memory and transmitting-receiving device using extending circuit for memory
04/17/2007US7206870 Data interface register structure with registers for data, validity, group membership indicator, and ready to accept next member signal
04/17/2007US7205792 Methods and circuitry for implementing first-in first-out structure
04/12/2007WO2007041141A2 Circuit and method for detecting non-volatile memory during a boot sequence
04/11/2007CN1945489A 串行数据输入系统 Serial data input system
04/10/2007US7203803 Overflow protected first-in first-out architecture
04/10/2007US7203636 Endian transformation
04/05/2007WO2007037843A2 Method and apparatus for sharing memory in a multiprocessor system
04/05/2007WO2007036070A1 Error diffusion for display frame buffer power saving
04/05/2007WO2007012919A3 Ripple queuing algorithm for a sas wide-port raid controller
04/05/2007WO2006060648A3 Interrupt notification block
04/05/2007US20070079024 Circuit and method for detecting non-volatile memory during a boot sequence
04/05/2007US20070076609 Method and equipment for performing aggregate-portion-specific flow shaping in packet-switched telecommunications
04/04/2007CN1942855A High speed shifter circuit
04/04/2007CN1309173C Method for compressing/decompressing structured document
04/03/2007US7200138 Physical medium dependent sub-system with shared resources for multiport xDSL system
04/03/2007US7199892 Facsimile apparatus and repeater
04/03/2007US7199730 Character string processing apparatus, character string processing method, and image-forming apparatus
03/2007
03/29/2007US20070073931 Audio player and method for playing audio data
03/28/2007CN1307557C Method and system for dynamic controlling FIFO internal memory accessing flowchart
03/27/2007US7197582 Low latency FIFO circuit for mixed clock systems
03/27/2007US7197190 Method for digital data compression
03/27/2007US7196710 Method and apparatus for buffering graphics data in a graphics system
03/22/2007US20070067812 Information providing method
03/22/2007US20070067511 Method and apparatus for sharing memory in a multiprocessor system
03/21/2007EP1764221A1 Data processing method, data processing device, mask production method and mask pattern
03/21/2007CN1306390C Multiplier using signed digit representation
03/20/2007US7194650 System and method for synchronizing multiple synchronizer controllers
03/20/2007US7194575 Automatic disk mirroring according to workload
03/20/2007US7194569 Method of re-formatting data
03/20/2007US7194500 Scalable gray code counter
03/15/2007WO2007030513A2 Systems and methods for delivering affinity or loyalty reward programs to network subscribers
03/15/2007WO2007030413A2 Vxml browser control channel
03/15/2007WO2006129226A3 Data pipeline management system and method for using the system
03/15/2007US20070061494 Semiconductor memory system, semiconductor memory chip, and method of masking write data in a semiconductor memory chip
03/15/2007US20070058536 Method and equipment for controlling the congestion management and scheduling of transmission-link capacity in packet-switched telecommunications
03/15/2007CA2621804A1 Vxml browser control channel
03/14/2007EP1762944A1 Asynchronous communication system and method between synchronous sub-circuits on a chip.
03/14/2007EP1761852A2 Semantic processor storage server architecture
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