| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 04/28/1993 | EP0539076A1 Controlling bus allocation using arbitration hold |
| 04/28/1993 | EP0538888A1 Information processing method and system |
| 04/28/1993 | EP0538829A2 Apparatus for reducing interrupt retry attempts |
| 04/28/1993 | EP0538705A1 Graphical user interface with gesture recognition in a multiapplication environment |
| 04/28/1993 | EP0538464A1 License management system |
| 04/28/1993 | EP0449985A4 Apparatus and method for using encoded video recorder/player timer preprogramming information |
| 04/28/1993 | EP0216533B1 Computer-based instrument system |
| 04/28/1993 | CN1071542A Method and apparatus of interconnecting computer network |
| 04/28/1993 | CN1071525A Microprocessor 2x core design |
| 04/28/1993 | CN1020387C Communication interface stirrup |
| 04/27/1993 | US5206953 Data communication system |
| 04/27/1993 | US5206946 Apparatus using converters, multiplexer and two latches to convert SCSI data into serial data and vice versa |
| 04/27/1993 | US5206943 Disk array controller with parity capabilities |
| 04/27/1993 | US5206940 Address control and generating system for digital signal-processor |
| 04/27/1993 | US5206937 Data communication system having plural stations connected to a single transmission path |
| 04/27/1993 | US5206936 Apparatus for exchanging channel adapter status among multiple channel adapters |
| 04/27/1993 | US5206935 Apparatus and method for fast i/o data transfer in an intelligent cell |
| 04/27/1993 | US5206932 Flexible frame buffer architecture having adjustable sizes for direct memory access |
| 04/27/1993 | US5206860 Recovery from a possible switching error in a computer i/o system |
| 04/27/1993 | US5206817 Pipelined circuitry for allowing the comparison of the relative difference between two asynchronous pointers and a programmable value |
| 04/27/1993 | CA1317031C Hierarchial arbitration system |
| 04/21/1993 | EP0537903A2 Distributed control system |
| 04/21/1993 | EP0537899A1 Bus arbitration architecture incorporating deadlock detection and masking |
| 04/21/1993 | EP0537898A2 Computer system including video subsystem |
| 04/21/1993 | EP0537481A2 Network selection of broadcast messages based on a content code |
| 04/21/1993 | EP0537401A1 Method for exchanging messages between a shared memory and communication adapters using an efficient logical protocol |
| 04/21/1993 | EP0537397A1 Adaptive FIFO memory controller |
| 04/21/1993 | EP0537287A1 Method and coupler for interfacing a portable data carrier with a host processor |
| 04/21/1993 | EP0490980A4 Multiple facility operating system architecture |
| 04/21/1993 | EP0334954B1 Layered network |
| 04/20/1993 | US5204961 Computer network operating with multilevel hierarchical security with selectable common trust realms and corresponding security protocols |
| 04/20/1993 | US5204955 Network management method and system |
| 04/20/1993 | US5204954 Remote storage management mechanism and method |
| 04/20/1993 | US5204951 Apparatus and method for improving the communication efficiency between a host processor and peripheral devices connected by an scsi bus |
| 04/20/1993 | US5204950 Data processing system for transmitting data between a host processor and an i/o device |
| 04/20/1993 | US5204883 Method and apparatus for recognition of a framing pattern distributed in a serial bit stream |
| 04/20/1993 | CA1316610C Shared file management in a network environment |
| 04/16/1993 | CA2071376A1 Controlling bus reallocation using arbitration hold |
| 04/16/1993 | CA2071301A1 Error detection and recovery in a dma controller |
| 04/15/1993 | WO1993007569A1 Method and apparatus for concurrent packet bus |
| 04/15/1993 | WO1993007568A1 Setting up system configuration in a data processing system |
| 04/15/1993 | WO1993007566A1 Temporary message routing and destination selection |
| 04/15/1993 | WO1993004432A3 High-performance dynamic memory system |
| 04/15/1993 | DE4224072A1 Data communication processor for hierarchical system - has single chip data processor with on chip memory and interfaces coupled to second and third level protocol ROM modules |
| 04/15/1993 | DE4133998A1 Printer selector for computer networks - has selector connecting number of printers to computer, or vica versa, with input control and display unit |
| 04/14/1993 | EP0537072A1 Method and system for interfacing PC TO CD-Rom drives |
| 04/14/1993 | EP0536946A2 A multiprocessor computer for solving sets of equations |
| 04/14/1993 | EP0536929A1 Transition-based wired "OR" for VLSI systems |
| 04/14/1993 | EP0536627A2 Bus driver circuit |
| 04/14/1993 | CN1071018A Method for controling peripheral apparatus, method for controlling floppy disk apparatus, peripheral apparatus, floppy disk apparatus, and data processing system |
| 04/13/1993 | US5203007 Overriding programmable priority and selective blocking in a computer system |
| 04/13/1993 | US5203004 Multi-board system having electronic keying and preventing power to improperly connected plug-in board with improperly configured diode connections |
| 04/13/1993 | US5202999 Access request prioritization and summary device |
| 04/13/1993 | US5202990 Exclusive control system capable of simply locking each resource |
| 04/13/1993 | US5202973 Method of controlling a shared memory bus in a multiprocessor system for preventing bus collisions and for ensuring a full bus |
| 04/13/1993 | US5202970 Method for sharing memory in a multiprocessor system |
| 04/13/1993 | US5202966 Centralized bus arbitration circuit |
| 04/13/1993 | US5202965 Electronic system with a plurality of removable units |
| 04/13/1993 | US5202963 In a data processing system |
| 04/13/1993 | US5202884 Multiplexing scheme for modem control signals |
| 04/13/1993 | US5202856 Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports |
| 04/13/1993 | US5202822 Universal scheme of input/output redundancy in a process control system |
| 04/13/1993 | CA1316267C Microprogrammed timer processor |
| 04/13/1993 | CA1316236C Method of and circuit arrangement for synchronizing a digital data transmission arrangement with a network-external clock |
| 04/12/1993 | CA2076293A1 Multiprocessor computer for solving sets of equations |
| 04/07/1993 | EP0535822A1 Methods and apparatus for locking arbitration on a remote bus |
| 04/07/1993 | EP0535821A1 Method and apparatus for dynamically steering undirected interrupts |
| 04/07/1993 | EP0535793A2 Method for managing data transfers in a computing system having a dual bus structure |
| 04/07/1993 | EP0535749A2 Local communication bus system and apparatuses for use in such a system |
| 04/07/1993 | EP0535697A1 Microprocessor bus interface protocol analyzer |
| 04/07/1993 | EP0535670A1 Burst read address generation |
| 04/07/1993 | EP0535630A2 Automatic vending machine for vending information transmitted from satellite |
| 04/07/1993 | EP0535539A1 CPU-exchangeable computer system |
| 04/07/1993 | EP0535284A1 Method and apparatus for extending the connection capability of a communication system |
| 04/07/1993 | CN1070751A Multi-media signal processor computer system |
| 04/06/1993 | US5201053 Dynamic polling of devices for nonsynchronous channel connection |
| 04/06/1993 | US5201051 Apparatus for interrupt detection and arbitration |
| 04/06/1993 | US5201038 Address bus for stackable computer board connectors |
| 04/06/1993 | US5201036 Data processor having wait state control unit |
| 04/06/1993 | CA1315892C Arbitration system |
| 04/06/1993 | CA1315891C2 Multitask subscription data retrieval system |
| 04/06/1993 | CA1315890C Method and apparatus for increasing system throughput via an input/output bus and enhancing address capability of a computer system during dma read/write operations between a common memory and an input/output device |
| 04/06/1993 | CA1315889C Computer workstation with interrupt signaling arrangement |
| 04/05/1993 | CA2079564A1 Burst read address generation |
| 04/01/1993 | WO1993006553A1 Multi-media signal processor computer system |
| 04/01/1993 | WO1993006549A1 A system for performing input and output operations to and from a processor |
| 04/01/1993 | WO1993006546A1 Atms/pos based electronic mail system |
| 04/01/1993 | DE4232396A1 Modular computer system in 3=dimensional SMD technology - contains parts formed on IC connector with two or more carrier boards connected by common edge boards. |
| 04/01/1993 | DE4231317A1 Spinner and winder data transfer - uses indication signal channel in addition for main station to set priority sequence for min. delay and prevent multiple data transmissions |
| 04/01/1993 | DE4131909A1 Protocol converter with freely settable parameters for coupling computers etc. with serial interfaces to Ether net (RTM) - contains protocol conversion devices and receives physical and protocol parameter settings over the LAN. |
| 04/01/1993 | DE4131133A1 Exchanging data in processing system, esp. for process control - transferring messages in communications with header fields contg. message identifiers. |
| 03/31/1993 | EP0534886A2 Network redirection for the enhancement of server capacities |
| 03/31/1993 | EP0534883A1 Method and apparatus for synchronizing the readout of a sequential media device with a separate clocked device |
| 03/31/1993 | EP0534882A2 Multi-channel communications system |
| 03/31/1993 | EP0534770A2 User transparent system for using any one of a family of processors in a single socket |
| 03/31/1993 | EP0534745A2 High capacity, low profile disk drive system |
| 03/31/1993 | EP0534662A2 Bus-to-bus interface for preventing data incoherence in a multiple processor computer system |
| 03/31/1993 | EP0534529A1 Apparatus and method for burst data transfer |
| 03/31/1993 | EP0534262A2 Open architecture video pipe system |
| 03/31/1993 | EP0534129A1 Interface circuit for data transfer |