Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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12/23/1992 | CN1067320A Method for switchover of multi-display card |
12/22/1992 | US5173898 Multiple-access control for a communication system with order pad passing |
12/22/1992 | US5173897 Method of restoring the correct cell sequence, particularly in an atm exchange, and output unit therefor |
12/22/1992 | US5173619 Bidirectional buffer with latch and parity capability |
12/22/1992 | CA2045258A1 System and method for a fast data write from a computer system to a storage system |
12/22/1992 | CA1311851C Hardware mechanism for automatically detecting hot-spot references and diverting same from memory traffic in a multiprocessor computer system |
12/16/1992 | EP0518595A2 Router using multiple hop redirect messages to enable bridge-like data forwarding |
12/16/1992 | EP0518527A2 Method of reducing wasted bus bandwidth in a computer system |
12/16/1992 | EP0518511A2 Computer having I/O channel check and parity check detector |
12/16/1992 | EP0518504A1 Personal computer with local bus arbitration |
12/16/1992 | EP0518503A1 Personal computer with anticipatory memory control signalling |
12/16/1992 | EP0518502A1 Personal computor with processor reset control |
12/16/1992 | EP0518488A1 Bus interface and processing system |
12/16/1992 | EP0518195A2 Method and system for exchanging information between application programs |
12/16/1992 | EP0518037A2 Bus arbitration system |
12/16/1992 | EP0517808A1 A method and apparatus for transferring data through a staging memory |
12/16/1992 | EP0329725B1 Microcomputer with on-board chip selects and programmable bus stretching |
12/16/1992 | CN1067126A Personal computer with anticipatory memory control signalling |
12/16/1992 | CN1067125A Personal computer with processor reset control |
12/16/1992 | CN1019530B Computer controlled double-cassette tape recorder |
12/15/1992 | US5172373 Packet communication system and its control method |
12/14/1992 | CA2044574A1 Information distribution through a communication subscription system utilizing an interactive storage and retrieval device |
12/11/1992 | CA2067599A1 Personal computer with riser connector for alternate master |
12/10/1992 | WO1992022035A1 Cache subsystem for microprocessor based computer with asynchronous and synchronous data path |
12/10/1992 | WO1992022034A1 A high-performance host interface for atm networks |
12/10/1992 | DE4118702A1 Address-generator for network module e.g. in vehicle - generates individual address for modules within local area network using comparators coupled to passive components |
12/10/1992 | CA2109917A1 A high-performance host interface for atm networks |
12/09/1992 | EP0517609A1 Method and arbitration bus for transmission of serial data |
12/09/1992 | EP0517512A2 Computer system and method of establishing communication therein |
12/09/1992 | EP0517509A1 A computer including a storage controller |
12/09/1992 | EP0517508A1 Storage controller for a personal computer |
12/09/1992 | EP0517358A1 Bus cycle control means |
12/09/1992 | EP0516993A1 Removable media emulator |
12/09/1992 | EP0516834A1 Neural network with daisy chain control |
12/09/1992 | EP0329779B1 Session control in network for digital data processing system which supports multiple transfer protocols |
12/08/1992 | US5170483 System having constant number of total input and output shift registers stages for each processor to access different memory modules |
12/08/1992 | US5170481 For use with a computer bus and a processor |
12/08/1992 | US5170477 Odd boundary address aligned direct memory acess device and method |
12/08/1992 | US5170472 Dynamically changing a system i/o configuration definition |
12/08/1992 | US5170471 Command delivery for a computing system for transferring data between a host and subsystems with busy and reset indication |
12/08/1992 | US5170470 Integrated modem which employs a host processor as its controller |
12/08/1992 | US5170469 Data transfer apparatus and data transfer system |
12/08/1992 | CA1311313C Peripheral repeater box |
12/08/1992 | CA1311310C Peripheral controller and adapter interface |
12/08/1992 | CA1311309C High speed microprocessor with one-shot timer for 8-bit i/o accesses |
12/08/1992 | CA1311305C State machine checker |
12/08/1992 | CA1311281C2 Modem with improved digital signal processor |
12/07/1992 | CA2055962A1 Bus arbitration system |
12/02/1992 | EP0516531A1 Date processing method for date transfer system, in particular for telemetering or telecommand system |
12/02/1992 | EP0516455A1 Electrical, intrinsically-safe interface devices |
12/02/1992 | EP0516371A2 Video teleconferencing system |
12/02/1992 | EP0516324A1 Personal computer with alternate system controller |
12/02/1992 | EP0516323A1 Personal computer systems |
12/02/1992 | EP0516289A2 Computer system and method of operating the computer system |
12/02/1992 | EP0516176A2 Hierarchical structured module system |
12/02/1992 | EP0515907A2 Protocol data generator-analyzer |
12/02/1992 | CN1019336B Microprocessor vectored interrupts |
12/01/1992 | US5168572 System for dynamic selection of globally-determined optimal data path |
12/01/1992 | US5168570 Method and apparatus for a multiple request toggling priority system |
12/01/1992 | US5168569 Bus control system for shortening bus occupation time |
12/01/1992 | US5168568 Delaying arbitration of bus access in digital computers |
12/01/1992 | US5168564 Cancel mechanism for resilient resource management and control |
12/01/1992 | US5168562 Method and apparatus for determining the allowable data path width of a device in a computer system to avoid interference with other devices |
12/01/1992 | US5168561 Pipe-line method and apparatus for byte alignment of data words during direct memory access transfers |
12/01/1992 | US5168558 Apparatus and method for providing distributed control in a main memory unit of a data processing system |
12/01/1992 | US5168556 Method and circuit arrangement for controlling a serial interface circuit |
12/01/1992 | US5168495 Nested frame communication protocol |
12/01/1992 | US5168456 Incremental frequency domain correlator |
12/01/1992 | US5168347 Integrated circuit chip package having signal input/output connections located at edges of the substrate |
12/01/1992 | CA2069985A1 Data processing method for a data exchange system, especially a telemetering or remote control system |
11/26/1992 | WO1992021088A1 Novel electrical bus structure |
11/26/1992 | WO1992021081A1 Suspend/resume capability for a protected mode microprocessor and hard disk, and idle mode implementation |
11/26/1992 | DE4121974A1 Hard disc drive controller for personal computer - has access time reduced using transputer based control processor operating with multiple parallel channels |
11/25/1992 | EP0515296A1 Process and apparatus for managing network event counters |
11/25/1992 | EP0515290A1 A method and a device for testing a computer system board |
11/25/1992 | EP0515165A1 A Memory access device |
11/25/1992 | EP0515097A1 Bus transceiver |
11/25/1992 | EP0515035A1 A bus timing system of a computer |
11/25/1992 | EP0514697A2 Split instruction paging method |
11/25/1992 | EP0514477A1 Interface chip device |
11/25/1992 | EP0514428A1 Arbitration among multiple users of a shared resource |
11/25/1992 | CN1019234B Microcomputer output image transformer |
11/24/1992 | WO1992021085A1 Method for error correction of a transmitted data word |
11/24/1992 | US5167029 Data processing system and associated process using memory cards having data modify functions utilizing a data mask and an internal register |
11/24/1992 | US5167028 System for controlling task operation of slave processor by switching access to shared memory banks by master processor |
11/24/1992 | US5167022 Multiprocessor bus locking system with a winning processor broadcasting an ownership signal causing all processors to halt their requests |
11/24/1992 | US5167019 Apparatus and method for interconnecting a plurality of devices to a single node in a node-limited serial data bus computer network |
11/24/1992 | US5166931 Communications network dynamic addressing arrangement |
11/24/1992 | US5166674 Multiprocessing packet switching connection system having provision for error correction and recovery |
11/24/1992 | CA2084884A1 Method for error correction of a transmitted data word |
11/24/1992 | CA2062135A1 Split instruction paging method and means |
11/24/1992 | CA1310762C2 Arbitration technique for a split transaction bus in a multiprocessor computer system |
11/19/1992 | EP0514306A2 Method of excluding inactive nodes from two-phase commit operations in a distributed transaction processing system |
11/19/1992 | EP0514195A2 Bus routing circuit |
11/19/1992 | EP0514080A2 Transition signalling data communications |
11/19/1992 | EP0513799A1 System for supporting a conversion between abstract syntax and transfer syntax |
11/19/1992 | EP0513581A1 Circuit arrangement for bidirectional data transfer |
11/19/1992 | EP0513519A1 Memory system for multiprocessor systems |
11/19/1992 | EP0513206A1 Networked facilities management system. |
11/19/1992 | EP0513137A1 Arrangement for a distributed control system. |