| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 08/04/1993 | EP0358690B1 Method and apparatus for initiating transactions on a multiprocessor computer system employing multiple lock indications |
| 08/04/1993 | EP0344216B1 Method and apparatus for implementing multiple lock indicators in a multiprocessor computer system |
| 08/04/1993 | EP0335968B1 Computer interconnect coupler employing crossbar switching |
| 08/04/1993 | CN1021753C Tracking resolution of problem on computer system in service network of computer systems |
| 08/04/1993 | CN1021752C Flexible service network for computer systems |
| 08/04/1993 | CN1021751C Problem prevention on computer system in service network of computer systems |
| 08/04/1993 | CN1021750C Automated enrollment of computer system into service network of computer systems |
| 08/03/1993 | US5233693 First-in first-out storage facility having bypassing loop thereof |
| 08/03/1993 | US5233692 Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface |
| 08/03/1993 | US5233638 Timer input control circuit and counter control circuit |
| 08/03/1993 | US5233604 Methods and apparatus for optimum path selection in packet transmission networks |
| 08/03/1993 | US5233346 Apparatus and method for electronically programming nodal identifications |
| 08/03/1993 | CA1321032C Multiprocessor control system |
| 08/03/1993 | CA1321030C Programmable data transfer timing |
| 08/01/1993 | CA2088429A1 Communications system |
| 07/28/1993 | EP0552873A1 Modifying system configuration in a computer system |
| 07/28/1993 | EP0552565A2 Input/output coprocessor for printing machine |
| 07/28/1993 | EP0552507A1 Arbiter with a direct signal that is modifiable under priority-conflict control |
| 07/28/1993 | EP0552384A1 Procedure for the reduction of the number of bits of a binary address word |
| 07/28/1993 | EP0372021A4 Universal connector device |
| 07/28/1993 | CN1074767A Method for reconfiguration of computer, device and system |
| 07/27/1993 | US5231679 Image processing apparatus and image reducing circuit therefor |
| 07/27/1993 | US5231593 Maintaining historical lan traffic statistics |
| 07/27/1993 | CA1320767C Atomic sequence for phase transitions |
| 07/21/1993 | EP0551934A2 Digital signal processor |
| 07/21/1993 | EP0551933A2 Digital signal processor |
| 07/21/1993 | EP0551932A2 Digital signal processor |
| 07/21/1993 | EP0551931A2 Digital signal processor |
| 07/21/1993 | EP0551789A1 Apparatus for recovering lost buffers in a data processing system |
| 07/21/1993 | EP0551494A1 Intelligent hardware for automatically reading and writing multiple sectors of data between a computer bus and a disk drive |
| 07/21/1993 | EP0530310A4 Programmable signal processor architecture |
| 07/21/1993 | EP0357667B1 Node for backplane bus |
| 07/20/1993 | US5230071 Method for controlling the variable baud rate of peripheral devices |
| 07/20/1993 | US5230067 Bus control circuit for latching and maintaining data independently of timing event on the bus until new data is driven onto |
| 07/20/1993 | US5230065 Apparatus and method for a data processing system having a peer relationship among a plurality of central processing units |
| 07/20/1993 | US5230054 Priority order judging device |
| 07/20/1993 | US5230052 Apparatus and method for loading bios into a computer system from a remote storage location |
| 07/20/1993 | US5230044 Arbitration apparatus for shared bus |
| 07/20/1993 | US5229652 Non-contact data and power connector for computer based modules |
| 07/20/1993 | CA1320590C Mechanism for transferring messages between source and destination users through a shared memory |
| 07/20/1993 | CA1320589C Twinax interface circuit |
| 07/14/1993 | EP0551242A2 Multiprocessor buffer system |
| 07/14/1993 | EP0551191A1 Apparatus and method for transferring data to and from host system |
| 07/14/1993 | EP0550976A2 Memory accessing device using address pipeline |
| 07/14/1993 | EP0550864A1 Communication control apparatus |
| 07/14/1993 | EP0550457A1 Fault tolerant computer system. |
| 07/14/1993 | CN1074300A Cursor lock region |
| 07/13/1993 | US5228137 Method for controlling execution of host computer application programs through a second computer by establishing relevant parameters having variable time of occurrence and context |
| 07/13/1993 | US5228130 Multi-channel peripheral interface using selectively flaggable channel register sets for concurrent write in response to any selected channel register write instruction |
| 07/13/1993 | US5228129 Synchronous communication interface for reducing the effect of data processor latency |
| 07/13/1993 | US5228128 Personal computer facsimile device |
| 07/13/1993 | US5228122 Method for bypassing user unwanted display screens from a host controlled terminal |
| 07/13/1993 | US5228034 Ring communication network station |
| 07/13/1993 | US5227957 Modular computer system with passive backplane |
| 07/13/1993 | CA1320281C Bus organized structure with variable arbitration means |
| 07/13/1993 | CA1320280C Temporary state preservation for a distributed file service |
| 07/08/1993 | WO1993013633A1 Receiver/decoder for a serial network of i/o devices |
| 07/08/1993 | WO1993013484A1 A synchronous serial communication network for controlling single point i/o devices |
| 07/08/1993 | WO1993013483A1 Software control of hardware interruptions |
| 07/08/1993 | DE4300112A1 Interface card for connecting computer and vehicle servicing system - has synchronous parallel access paths and microcontroller for data format, reception and storage |
| 07/07/1993 | EP0550374A2 User selectable lock regions cross-referenced to related applications |
| 07/07/1993 | EP0550370A2 Collaborative computer based system |
| 07/07/1993 | EP0550241A1 Bidirectional data storage facility for bus interface unit |
| 07/07/1993 | EP0550224A1 Bus control logic for computer system having dual bus architecture |
| 07/07/1993 | EP0550223A2 Arbitration control logic for computer system having dual bus architecture |
| 07/07/1993 | EP0550196A2 Personal computer with generalized data streaming apparatus for multimedia devices |
| 07/07/1993 | EP0550164A1 Method and apparatus for interleaving multiple-channel DMA operations |
| 07/07/1993 | EP0550163A1 Circuit architecture for supporting multiple-channel DMA operations |
| 07/07/1993 | EP0550147A1 Method and apparatus for arbitration based on the availability of resources |
| 07/07/1993 | EP0550059A1 Selection response circuit according to small computer system interface |
| 07/07/1993 | EP0549937A1 Methods and systems for alarm correlation and fault localization in communication network |
| 07/07/1993 | EP0549924A1 Asynchronous co-processor data mover method and means |
| 07/07/1993 | EP0549677A1 Network management system using model-based intelligence. |
| 07/07/1993 | EP0549633A1 Improved memory system |
| 07/07/1993 | CN1074052A Bidirectional data memory used for bus interface unit |
| 07/07/1993 | CN1074051A Bus interface logic for computer system having dual bus architecture |
| 07/07/1993 | CN1074050A Bus control logic for computer system having dual bus architecture |
| 07/07/1993 | CN1074049A Arbitration control logic for computer system with dual-bus structure |
| 07/07/1993 | CN1021536C Metrical dispatcher of serial communication controller on data handling stystem |
| 07/06/1993 | US5226173 Integrated data processor having mode control register for controlling operation mode of serial communication unit |
| 07/06/1993 | US5226156 Control and sequencing of data through multiple parallel processing devices |
| 07/06/1993 | US5226125 Switch matrix having integrated crosspoint logic and method of operation |
| 07/06/1993 | US5226124 Communication interface between a radio control transmitter and a computer data bus |
| 07/06/1993 | US5226121 Method of bit rate de-adaption using the ECMA 102 protocol |
| 07/06/1993 | US5226079 Non-repudiation in computer networks |
| 07/06/1993 | US5226040 Data concentration interface for configuration of multiple TTY devices |
| 07/06/1993 | US5226012 Buffer memory circuit having constant propagation delay |
| 07/06/1993 | US5226010 Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports |
| 07/06/1993 | US5225967 Information processing system architecture including two buses |
| 07/06/1993 | CA1320004C Hybrid communications link adapter incorporating input/output and data communications technology |
| 07/06/1993 | CA1320003C Interconnection system for multiprocessor structure |
| 07/06/1993 | CA1319997C Specialized communication processor for layered protocols |
| 07/03/1993 | CA2080608A1 Bus control logic for computer system having dual bus architecture |
| 07/01/1993 | DE4244427A1 Computer interconnection system for data flow control - has circuits in receiving unit to select next in numerical sequence data sets or out of sequence data sets from any other unit |
| 07/01/1993 | CA2084135A1 Playlist mechanism for specification of complex memory objects |
| 06/30/1993 | EP0549509A2 Automatic attribute assignment of multimedia distributions in a data processing system |
| 06/30/1993 | EP0549504A2 Process control for real time systems |
| 06/30/1993 | EP0549334A2 A data input and output control device and a one-chip microcomputer integrating the same |
| 06/30/1993 | EP0549248A2 An arbitration system and method |
| 06/30/1993 | EP0549217A1 Small computer system interface for non-local SCSI devices |