Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
07/1992
07/08/1992EP0494032A2 Icon object interface system and method
07/08/1992EP0493934A2 Communications network
07/08/1992EP0493888A2 Personal computer with local memory expansion capability
07/08/1992EP0493881A2 Bus architecture for a multimedia system
07/08/1992EP0493504A1 Input/output module having a combination input/output point.
07/07/1992US5129090 System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration
07/07/1992US5129089 Distributed interlock apparatus and distributed interlock management method
07/07/1992US5129085 Computer network with shared memory using bit maps including flags to indicate reserved memory areas and task status
07/07/1992US5129078 Dedicated service processor with inter-channel communication features
07/07/1992US5129075 Data processor with on-chip logical addressing and off-chip physical addressing
07/07/1992US5129072 System for minimizing initiator processor interrupts by protocol controller in a computer bus system
07/07/1992US5129069 Method and apparatus for automatic memory configuration by a computer
07/07/1992US5129065 Apparatus and methods for interface register handshake for controlling devices
07/07/1992US5129064 System and method for simulating the I/O of a processing system
07/07/1992US5129063 Data processing station and an operating method
07/07/1992US5129062 VMEbus-UCDP interface module
07/07/1992US5128995 Apparatus and method for loading a system reference diskette image from a system partition in a personal computer system
07/07/1992US5128926 Updating link state information in networks
07/07/1992US5128677 Apparatus and method for transferring data along a serial data bus
07/07/1992US5128666 Protocol and apparatus for a control link between a control unit and several devices
07/07/1992US5128557 Clamping circuit for data transfer bus
07/07/1992US5127303 Karaoke music reproduction device
07/07/1992CA1304828C Method and apparatus for implementing multiple lock indicators in a multiprocessor computer system
07/07/1992CA1304826C Terminal device session management protocol
07/07/1992CA1304805C Data transmission system
07/02/1992DE4042263A1 Recognising microprocessor interrupt state - monitoring address, data and=or control bus by circuit recognising interruption
07/02/1992DE4041952A1 Multiprocessor system with main and subordinated computers
07/01/1992EP0493294A2 Method for minimizing path delay and optimizing cycle time in a machine
07/01/1992EP0493215A1 Distributed computer architecture using a CSMA/DC type local network
07/01/1992EP0493214A1 Shell structure for terminal adapter belonging to a distributed architecture of a computer system
07/01/1992EP0493157A2 Serial network topology generator
07/01/1992EP0493156A2 Fault isolation and bypass reconfiguration unit
07/01/1992EP0492972A2 Serial link communication systems
07/01/1992EP0492913A2 Signal conditioning logic
07/01/1992EP0492817A2 Data processing system and memory controller for lock semaphore operations
07/01/1992EP0492794A2 Arbitration circuit for a multimedia system
07/01/1992EP0492613A1 High speed data transceiver
07/01/1992EP0492177A1 Circuit device for interfacing between several processing units equipped with microprocessors
07/01/1992EP0492072A1 Data transfer bus system and method serving multiple parallel asynchronous units
07/01/1992EP0492026A1 Modular buffer memory for packet switched network
07/01/1992EP0492025A1 High-speed multi-port FIFO buffer circuit
07/01/1992CN1017287B Apparatus and method for a data processing system having a peer relationship among plurality of central processing units
07/01/1992CN1017286B Bidifectional control signalling bus interface apparatus for transmitting signals between two bus system
07/01/1992CN1017285B Peripheral bus
06/1992
06/30/1992US5127095 Addressing system for a memory unit
06/30/1992US5127089 Synchronous bus lock mechanism permitting bus arbiter to change bus master during a plurality of successive locked operand transfer sequences after completion of current sequence
06/30/1992US5127088 Disk control apparatus
06/30/1992US5127050 Information processing apparatus separably combined with telephone unit
06/30/1992US5126883 Telephoto zoom lens
06/30/1992US5126845 Pipeline bus having registers and selector for real-time video signal processing
06/30/1992CA1304523C Computer bus having page mode memory access
06/30/1992CA1304522C Memory address generation apparatus
06/30/1992CA1304518C Methods of appending a reply in an electronic mail system
06/30/1992CA1304514C Fast emulator using slow processor
06/30/1992CA1304513C Multiple i/o bus virtual broadcast of programmed i/o instructions
06/25/1992WO1992011598A1 Electronic wallet
06/25/1992WO1992010802A1 Method and apparatus for multiprocessor digital communication
06/25/1992WO1992005485A3 Network management system using model-based intelligence
06/24/1992EP0491569A2 Communication systems
06/24/1992EP0491480A2 Computer addressing apparatus
06/24/1992EP0491183A1 Bus system
06/24/1992EP0491179A1 Linear data bus
06/24/1992EP0490988A1 Enhanced vmebus protocol utilizing pseudosynchronous handshaking and block mode data transfer
06/24/1992EP0490980A1 Multiple facility operating system architecture
06/24/1992EP0490973A1 Parallel i/o network file server architecture
06/24/1992CN1062226A Tracking resolution of problem on computer system in service network of computer systems
06/24/1992CN1062091A Medicament dispensing device
06/23/1992US5125093 Interrupt control for multiprocessor computer system
06/23/1992US5125089 Asynchronous-to-synchronous parallel word transfer circuit for preventing incoming asyncronous parallel byte data from interfering with outgoing synchronous data
06/23/1992US5125088 Computer system speed control at continuous processor speed
06/23/1992US5125081 Inter-configuration changing controller based upon the connection and configuration information among plurality of clusters and the global storage
06/23/1992US5125080 Logic support chip for AT-type computer with improved bus architecture
06/23/1992US5125079 Method for controlling the data transmission of a central unit interfacing control circuit and circuit arrangement for the implementation of the method
06/23/1992US5125075 System for circulating serially an electronic, non-interchangeable unique, route package from sender to selected recipients
06/23/1992US5125044 Image processing apparatus and method in which a plurality of access circuits can simultaneously perform access operations
06/23/1992US5124943 Digital network utilizing telephone lines
06/23/1992US5124591 Low power push pull driver
06/23/1992US5123848 Computer signal interconnect apparatus
06/23/1992CA1304167C Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
06/22/1992CA2057249A1 Signal conditioning logic
06/21/1992CA2058092A1 Circuit device for interfacing between several processing units equipped with microprocessors
06/19/1992CA2054581A1 Interface for keyboard emulation provided by an operating system
06/17/1992EP0490801A2 Network communications intermediate interface
06/17/1992EP0490636A2 Method and apparatus for interprocess message switching
06/17/1992EP0490624A2 Graphical configuration of data processing networks
06/17/1992EP0490573A1 Method and apparatus for providing high performance interconnection between information buses
06/17/1992EP0490373A1 Electronic apparatus having connection means
06/17/1992EP0311665B1 Data communication network
06/16/1992US5123100 Timing control method in a common bus system having delay and phase correcting circuits for transferring data in synchronization and time division slot among a plurality of transferring units
06/16/1992US5123092 External expansion bus interface
06/16/1992US5123091 Data processing system and method for packetizing data from peripherals
06/16/1992US5123089 Apparatus and protocol for local area network
06/16/1992US5123063 Image processor utilizing and controlling a plurality of scanners
06/16/1992US5122691 Integrated backplane interconnection architecture
06/16/1992CA1303748C Tandem priority resolver
06/16/1992CA1303746C Data processing system
06/15/1992CA2058048A1 Method and apparatus for interprocess message switching
06/15/1992CA2032268A1 Multiple processor control system having shared memory communication
06/11/1992WO1992010047A1 Arrangement for the connection of a computer to an individual analog telephone
06/11/1992WO1992010035A1 Binary data communication system