Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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11/19/1992 | EP0512993A1 Bus locking fifo multi-processor communication system |
11/19/1992 | EP0512991A1 High speed, flexible source/destination data burst direct memory access controller |
11/18/1992 | CN2121850U 箱 Box |
11/18/1992 | CN1019154B System management apparatus for multiprocessor system |
11/18/1992 | CN1019152B Interface between processor and special instruction processor in digital data processing system |
11/17/1992 | US5165037 System for controlling the transferring of different widths of data using two different sets of address control signals |
11/17/1992 | US5165031 Coordinated handling of error codes and information describing errors in a commit procedure |
11/17/1992 | US5165030 Method and system for dynamic creation of data stream based upon system parameters and operator selections |
11/17/1992 | US5165022 Channel and control unit having a first I/O program protocol for communication with a main processor and a second universal I/O program protocol for communication with a plurality of I/O adapters |
11/17/1992 | US5165019 Ring interconnect system architecture |
11/17/1992 | US5164960 Medium attachment unit for use with twisted pair local area network |
11/17/1992 | US5164943 Cyclic redundancy check circuit |
11/17/1992 | US5163833 Dual personal computer architecture peripheral adapter board |
11/17/1992 | CA1310429C Access priority control system for main storage for computer |
11/17/1992 | CA1310427C Communications network |
11/17/1992 | CA1310426C2 Autocorrelating 2400 bps handshake sequence detector |
11/12/1992 | WO1992020028A1 Method and apparatus for buffering data within stations of a communication network |
11/12/1992 | WO1992020021A1 License management system |
11/12/1992 | DE4214303A1 Communications system for controlling electrical devices with properties in vehicles - establishes access between controller and communicator device before synchronising data sequences for transfer |
11/11/1992 | EP0512685A1 Quadrature bus protocol for carrying out transactions in a computer system |
11/11/1992 | EP0512290A2 Nested frame communication protocol |
11/10/1992 | US5163154 Microcontroller for the rapid execution of a large number of operations which can be broken down into sequences of operations of the same kind |
11/10/1992 | US5163153 Low-power, standby mode computer |
11/10/1992 | US5163152 Interrupt control apparatus for a microprocessor providing real time priority processing of interrupt requests |
11/10/1992 | US5163150 Information processor performing interrupt operation without saving contents of program counter |
11/10/1992 | US5163143 Enhanced locked bus cycle control in a cache memory computer system |
11/10/1992 | US5163137 Copying system with a dual trunk serial communication system using an acknowledge line |
11/10/1992 | US5163135 Computer system and method for setting recovery time upon execution of an I/O command |
11/10/1992 | US5163131 Parallel i/o network file server architecture |
11/10/1992 | US5162988 Multiplexing character processor |
11/10/1992 | US5162979 Personal computer processor card interconnect system |
11/10/1992 | US5162675 Dual personal computer architecture peripheral adapter board and circuit |
11/10/1992 | US5161980 Electrical interconnection of circuit devices |
11/10/1992 | CA2066020A1 High speed transition signalling communication system |
11/10/1992 | CA1310132C Method for notifying a terminal user of an asynchronous event occurrance |
11/08/1992 | CA2041946A1 Autoconfigurator |
11/05/1992 | DE4113920A1 Data exchange set=up between personal computer and programmable memory - uses multipole connectors with interface circuitry and control circuits for serial transmissions |
11/04/1992 | EP0511926A1 System for selectively intercepting and rerouting data network traffic |
11/04/1992 | EP0511925A2 Dynamic backup and recovery of focal points in a computer network |
11/04/1992 | EP0511851A2 Determining physical topology across repeaters and bridges in a computer network |
11/04/1992 | EP0511834A2 Multi-stage interconnect network for processing system |
11/04/1992 | EP0511795A1 system for and method of data communication on automobile |
11/04/1992 | EP0511769A1 Method and apparatus for processing interrupts in a computer system |
11/04/1992 | EP0511731A2 Message-passing multiprocessor system |
11/04/1992 | EP0511706A2 Bi-directional signal transmission system |
11/04/1992 | EP0511511A2 Microprocessor controlled electronic equipment |
11/04/1992 | EP0511476A2 Multiprocessor system |
11/04/1992 | EP0511467A2 Apparatus and method of operation for a facsimile subsystem in an image archiving system |
11/03/1992 | US5161215 Method for controlling data transfer buffer |
11/03/1992 | US5161162 Method and apparatus for system bus testability through loopback |
11/03/1992 | US5161156 Multiprocessing packet switching connection system having provision for error correction and recovery |
11/03/1992 | US5160923 Priority encoder for resolving priority contention |
11/03/1992 | US5160922 System and method for dynamic avoidance of a simultaneous switching output limitation of a integrated circuit chip |
11/03/1992 | CA1309779C Node for a backplane bus |
10/31/1992 | CA2060696A1 Apparatus and method of operation for a facsimile subsystem in an image archiving system |
10/29/1992 | WO1992019056A1 Method for syncrhonising input data of a computing processor and device for implementing such method |
10/29/1992 | WO1992019044A1 Circuit to selectively process dip switches onto bus lines |
10/29/1992 | WO1992018936A1 Method and apparatus for upgrading a computer processing system |
10/29/1992 | WO1992018934A1 Apparatus for driving both single-ended and differential computer buses |
10/29/1992 | WO1992018933A1 Mca bus arbitrator integrated circuit and use thereof |
10/29/1992 | CA2108365A1 Apparatus for driving both single-ended and differential computer buses |
10/28/1992 | EP0511144A1 Method and apparatus for interconnection of local area networks with wide area networks |
10/28/1992 | EP0511142A1 Method and apparatus for data processing network interconnection |
10/28/1992 | EP0510833A2 Data processing apparatus having address decoder |
10/28/1992 | EP0510617A1 Data processing apparatus with high-speed "macroservice" interrupt |
10/28/1992 | EP0510354A2 Method of monitoring the operation of a bus coupler |
10/28/1992 | EP0510243A2 Burst address sequence generator |
10/28/1992 | EP0510241A2 Upgradeable/downgradeable computer |
10/28/1992 | EP0493504A4 Input/output module having a combination input/output point |
10/27/1992 | US5159688 Information processor performing interrupt operation in two modes |
10/27/1992 | US5159684 Data communication interface integrated circuit with data-echoing and non-echoing communication modes |
10/27/1992 | US5159683 Graphics controller adapted to automatically sense the type of connected video monitor and configure the control and display signals supplied to the monitor accordingly |
10/27/1992 | US5159679 Computer system with high speed data transfer capabilities |
10/27/1992 | US5159674 Method for supplying microcommands to multiple independent functional units having a next microcommand available during execution of a current microcommand |
10/27/1992 | US5159672 Burst EPROM architecture |
10/27/1992 | US5159671 Data transfer unit for small computer system with simultaneous transfer to two memories and error detection and rewrite to substitute address |
10/27/1992 | US5159592 Network address management for a wired network supporting wireless communication to a plurality of mobile users |
10/27/1992 | US5159466 Facsimile apparatus with selectable data image coding |
10/27/1992 | US5159209 Circuit to selectively process dip switches onto bus lines |
10/27/1992 | CA1309507C System for management of the priorities of access to a memory and its application |
10/27/1992 | CA1309506C Asynchronous processor arbitration circuit |
10/27/1992 | CA1309505C Electronic mail circulation device |
10/27/1992 | CA1309503C Selective receiver for each processor in a multiple processor system |
10/21/1992 | EP0509945A2 Method and apparatus for remote administration of programmable workstations in a data processing system |
10/21/1992 | EP0509765A1 Radial bus assembly |
10/21/1992 | EP0509746A2 Interruption circuit for use with a central processing unit |
10/21/1992 | EP0509722A2 Data transfer system |
10/21/1992 | EP0509720A1 Peripheral device address control system |
10/21/1992 | EP0509644A1 Personal computer adapted for network communications |
10/21/1992 | EP0509140A1 Data bus system |
10/21/1992 | EP0509068A1 Dynamic association of rf radio data communication system in a pre-existing computer controlled network |
10/20/1992 | US5157772 Data bus arrangement with improved speed and timing |
10/20/1992 | US5157771 Apparatus for hot removal from/insertion to a connection bus of a non removable media magnetic recording unit |
10/20/1992 | US5157770 Nonsynchronous dasd control |
10/20/1992 | US5157769 Computer data interface for handheld computer transfer to second computer including cable connector circuitry for voltage modification |
10/20/1992 | US5157667 Methods and apparatus for performing fault isolation and failure analysis in link-connected systems |
10/20/1992 | US5157663 Fault tolerant computer system |
10/20/1992 | US5157384 Advanced user interface |
10/20/1992 | CA2063050A1 Parallel processing system |
10/15/1992 | WO1992017952A1 Transceiver interface |