Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
08/1993
08/31/1993US5241628 Method wherein source arbitrates for bus using arbitration number of destination
08/31/1993US5241627 Automatic processor module determination for multiprocessor systems for determining a value indicating the number of processors
08/31/1993US5241601 Communication system capable of quickly and impartially arbitrating employment of a data bus
08/31/1993US5241594 One-time logon means and methods for distributed computing systems
08/31/1993US5241548 Method for error correction of a transmitted data word
08/31/1993CA1321843C Method of packetizing data
08/31/1993CA1321842C Double unequal bus timeout
08/31/1993CA1321839C Dynamically configurable portable computer system
08/31/1993CA1321837C2 Method and apparatus for processing information data
08/26/1993DE4303741A1 Data transmitter for e.g. motor vehicle control - has computer, transmission line for serial data, interface coupled with address and data bus, and read and write control circuits
08/25/1993EP0557197A1 Access time sharing system to a memory shared by a processor and other applications
08/25/1993EP0557025A1 High performance channels for data processing systems
08/25/1993EP0557009A1 Apparatus for managing system interrupt operations in a computing system
08/25/1993EP0556981A1 Method and apparatus for transmitting and receiving code
08/25/1993EP0556314A1 Method and apparatus for providing down-loaded instructions for execution by a peripheral controller
08/25/1993EP0556305A1 A secure system for activating personal computer software at remote locations
08/25/1993EP0556295A1 Protected hot key function for microprocessor-based computer system
08/25/1993EP0358716B1 Node for servicing interrupt request messages on a pended bus
08/24/1993US5239661 Hierarchical bus circuit having decoder generating local buses and devices select signals enabling switching elements to perform data transfer operations
08/24/1993US5239658 Switchable parallel bus terminator having stable terminator voltage with respect to ambient temperature change
08/24/1993US5239654 Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode
08/24/1993US5239651 Method of and apparatus for arbitration based on the availability of resources
08/24/1993US5239649 Channel path load balancing, through selection of storage volumes to be processed, for long running applications
08/24/1993US5239648 Computer network capable of accessing file remotely between computer systems
08/24/1993US5239644 Data preloading method and system for using a buffer
08/24/1993US5239639 Efficient memory controller with an independent clock
08/24/1993US5239636 Buffer memory subsystem for peripheral controllers
08/24/1993US5239634 Memory controller for enqueuing/dequeuing process
08/24/1993US5239632 Device to translate logical unit number communications on one SCSI bus to ID communications on a subordinate SCSI bus
08/24/1993US5239631 Cpu bus allocation control
08/24/1993US5239630 Shared bus arbitration apparatus having a deaf node
08/24/1993US5239629 Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system
08/24/1993US5239627 Bi-directional parallel printer interface
08/24/1993US5239543 Communication system and a central processing unit as well as a communication station in the communication system
08/24/1993CA2018072C Feature board with automatic adjustment to slot position
08/24/1993CA1321658C Method and apparatus for optimizing inter-processor instruction transfers
08/24/1993CA1321657C Scsi converter
08/24/1993CA1321656C Method for restricting delivery and receipt of electronic message
08/24/1993CA1321654C Remote boot
08/22/1993WO1993017387A1 Cache snoop reduction and latency prevention apparatus
08/22/1993CA2108618A1 Cache snoop reduction and latency prevention apparatus
08/19/1993WO1993016434A1 Method and apparatus to reduce computer system bus interleave overhead
08/19/1993WO1993016430A1 An isdn audiovisual teleservices interface subsystem
08/19/1993DE4204011A1 Microprocessor based unit for setting and fixing parameters for servo-amplifier - has processor operating with memory that stores range of base valves to determine settings down-loaded to equipment
08/19/1993CA2128322A1 An audiovisual teleservices interface subsystem
08/18/1993EP0556148A1 Scheme for interlocking a line card to an address recognition engine
08/18/1993EP0556138A1 A bus for connecting extension cards to a data processing system and test method
08/18/1993EP0555979A2 Apparatus and method for controlling communication within a computing system
08/18/1993EP0555925A1 ATM policing function with autonomous reference time instants
08/18/1993EP0555881A2 Office automation system wherein files in a database are available to electronic mail services
08/18/1993EP0555680A1 A method and apparatus for determining instruction execution ordering in a data processing system
08/18/1993EP0555456A1 Data transmission process and data processing system with distributed computing nodes.
08/18/1993CN1021859C Control method and system for terminal state
08/17/1993US5237696 Method and apparatus for self-timed digital data transfer and bus arbitration
08/17/1993US5237695 Bus contention resolution method for network devices on a computer network having network segments connected by an interconnection medium over an extended distance
08/17/1993US5237690 System for testing adaptor card upon power up and having disablement, enablement, and reconfiguration options
08/17/1993US5237676 High speed data transfer system which adjusts data transfer speed in response to indicated transfer speed capability of connected device
08/17/1993US5237670 Method and apparatus for data transfer between source and destination modules
08/17/1993US5237667 Digital signal processor system having host processor for writing instructions into internal processor memory
08/17/1993US5237663 Low cost diagnostic/configuration interface
08/17/1993US5237662 System and method with a procedure oriented input/output mechanism
08/17/1993US5237660 Control method and apparatus for controlling the data flow rate in a FIFO memory, for synchronous SCSI data transfers
08/17/1993US5237659 Gateway device for connecting a computer bus to a ring network
08/17/1993US5237572 Active remote module for the attachment of user equipments to a communication processing unit
08/17/1993US5237567 Processor communication bus
08/17/1993US5237514 Minimizing path delay in a machine by compensation of timing through selective placement and partitioning
08/11/1993EP0555138A1 Method, system and processor for communications between a plurality of equipment subsystems
08/11/1993EP0554982A2 Environment monitoring system for standard interface bus computer systems
08/11/1993EP0554917A2 Digital signal processor
08/11/1993EP0554878A2 Output method for dot data and apparatus therefor
08/11/1993EP0554819A1 Transfer control unit, processor element and data transferring method
08/11/1993EP0554731A2 Line interface for high-speed transmission line
08/11/1993EP0554615A2 Scheduling apparatus for multimedia resources
08/11/1993EP0554608A2 Data processing system management apparatus and method
08/10/1993US5235698 Bus interface synchronization control system
08/10/1993US5235694 Multi i/o device system using temporary store of ram data when associated communicating i/o devices are operating at various clocking phases
08/10/1993US5235692 Disk rotational position controls for channel operations in a cached peripheral subsystem
08/10/1993US5235689 Interface circuit for dual port disk drive systems
08/10/1993US5235684 System bus having multiplexed command/id and data
08/10/1993US5235642 Access control subsystem and method for distributed computer system using locally cached authentication credentials
08/10/1993US5235602 Synchronous/asynchronous i/o channel check and parity check detector
08/10/1993US5235597 Synchronizing asynchronous protocol interactions between peer layers in different nodes of a layered communication network
08/05/1993WO1993015538A1 Power switch module
08/05/1993WO1993015465A1 User configurable media interface for network computer products
08/05/1993WO1993015464A1 Computer backplane having line switches
08/05/1993WO1993015463A1 A method of providing a communication circuit for transferring data between a processor system and an external system
08/05/1993WO1993015459A1 Live insertion of computer modules
08/05/1993WO1993008532A3 Basic input/output system (bios) program storage on a motherboard for a variety of computer cpu types
08/05/1993DE4202852A1 Transmission of information to all units of multiprocessor system - has simultaneous telegram containing identification address and data transmitted to all units
08/05/1993DE4202524A1 Multilayer rear-panel bus-board system for microprocessors - has bus plane board with connection points including connections to terminal resistors and capacitors
08/04/1993EP0554209A1 Direct memory access controller
08/04/1993EP0554164A1 Chip card with multi communication protocols
08/04/1993EP0553563A1 Bus interface logic for computer system having dual bus architecture
08/04/1993EP0553560A2 Communications system
08/04/1993EP0553549A1 Architecture for transferring pixel streams
08/04/1993EP0553374A1 Input/output system for data processing system
08/04/1993EP0553338A1 High-performance dynamic memory system
08/04/1993EP0470072A4 Distributed intelligence network using time and frequency multiplexing
08/04/1993EP0358725B1 Apparatus and method for servicing interrupts utilizing a pended bus
08/04/1993EP0358703B1 Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
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