Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
11/1993
11/02/1993CA1323929C Memory configuration for use with means for interfacing a system control unit for a multi-processor system with the system main memory
11/02/1993CA1323918C Communication processor for a packet-switched network
10/1993
10/28/1993WO1993021585A1 Non-contact data and power connector for computer based modules
10/28/1993WO1993021581A2 Cryptographic data security in a secured computer system
10/28/1993DE4213792A1 Operation of data transmission system for program memory control etc. - transmitting data as sequence with blocks for different subscribers and with input response telegram over common bus
10/28/1993CA2118246A1 Data enclave and trusted path system
10/27/1993EP0567354A1 Self-configuring bus termination component
10/27/1993EP0567294A2 Multi-system network addressing
10/27/1993EP0567283A1 System and method for efficient data communication
10/27/1993EP0567144A2 Disk control system
10/27/1993EP0566985A1 Method and apparatus for transfer of data packets
10/27/1993EP0566894A2 Optimized buffer handling in cooperative processing
10/27/1993EP0566662A1 Audio and video transmission and receiving system
10/27/1993EP0331720B1 Peripheral controller
10/26/1993US5257385 Apparatus for providing priority arbitration in a computer system interconnect
10/26/1993US5257383 Programmable interrupt priority encoder method and apparatus
10/26/1993US5257382 Data bank priority system
10/26/1993US5257368 System for dynamically changing a system I/O configuration by determining differences between current and future configurations and describing differences to software and hardware control blocks
10/26/1993US5257367 Data storage system with asynchronous host operating system communication link
10/26/1993US5257357 Method and apparatus for implementing a priority adjustment of an interrupt in a data processor
10/26/1993US5257356 Method of reducing wasted bus bandwidth due to slow responding slaves in a multiprocessor computer system
10/26/1993US5257353 I/O control system having a plurality of access enabling bits for controlling access to selective parts of an I/O device
10/26/1993US5257352 Input/output control method and system
10/26/1993US5257306 Video teleconferencing system
10/26/1993CA1323706C Technique for implementing byte-wide uart transfers on a 16-bit data bus
10/26/1993CA1323693C Easily installable and easily expandable electromechanical memory assembly
10/22/1993CA2094163A1 Multi-system network addressing
10/20/1993EP0566515A2 System clustering via serially attached remote I/O busses
10/20/1993EP0566482A1 High-level, bidirectional protocol for the communication between a hyper-media system and a plurality of editors
10/20/1993EP0566481A1 Shell structure for terminal adapters
10/20/1993EP0566421A1 Dual addressing arrangement for a communications interface architecture
10/20/1993EP0565850A1 Integrated messaging system
10/20/1993EP0490973A4 Parallel i/o network file server architecture
10/19/1993US5255388 Synchronizing slave processors through eavesdrop by one on a write request message directed to another followed by comparison of individual status request replies
10/19/1993US5255383 Method and apparatus for skewing a memory read clock signal in a magnetic disk drive system
10/19/1993US5255382 Program memory expander for 8051-based microcontrolled system
10/19/1993US5255380 Computer system with distributed RAM memory modules designed for CITO transmission
10/19/1993US5255378 Method of transferring burst data in a microprocessor
10/19/1993US5255377 Interface for arbitrating access to the paging unit of a computer processor
10/19/1993US5255376 Method and apparatus for supporting a dual bit length protocol for data transfers
10/19/1993US5255375 High performance interface between an asynchronous bus and one or more processors or the like
10/19/1993US5255374 Bus interface logic for computer system having dual bus architecture
10/19/1993US5255373 Decreasing average time to access a computer bus by eliminating arbitration delay when the bus is idle
10/19/1993US5255372 Apparatus for efficiently interconnecing channels of a multiprocessor system multiplexed via channel adapters
10/19/1993US5255371 Apparatus for interfacing a real-time communication link to an asynchronous digital computer system by utilizing grouped data transfer commands
10/19/1993US5255370 Data transfer apparatus and data transfer system
10/19/1993US5255358 Action bar processing on non-programmable workstations
10/19/1993US5255268 Data distribution network with improved broadcast feature
10/19/1993CA1323451C Cache-memory architecture
10/19/1993CA1323449C Method and apparatus for sharing memory in a multiprocessor system
10/19/1993CA1323443C Fault tolerant digital data processor with improved bus protocol
10/19/1993CA1323442C Digital data processor with fault tolerant peripheral bus communications
10/19/1993CA1323441C Fault tolerant digital data processor with improved input/output controller
10/19/1993CA1323440C Fault tolerant digital data processor with improved communications monitoring
10/14/1993WO1993020673A1 Circuit board connections
10/14/1993WO1993020520A1 Data bus using open drain drivers and differential receivers together with distributed termination impedances
10/14/1993WO1993020519A1 Future bus bus termination network
10/14/1993WO1993020518A1 Sharing of bus access among multiple state machines with minimal wait time and prioritization of like cycle types
10/14/1993WO1993020517A1 Universal bus motherboard using a universal-to-specific bus translator card
10/14/1993WO1993020516A1 Virtual fifo peripheral interface system and method
10/14/1993CA2132842A1 Circuit board connections
10/13/1993EP0565469A1 System for the contactless exchange of data between a terminal and a modular portable unit
10/13/1993EP0565229A2 Method and system for modem command processing during data transfer
10/13/1993EP0564779A2 Data processing system, method and program for constructing HOST access tables for integration of telephony data with data processing systems
10/13/1993EP0564469A1 Electronic wallet
10/12/1993US5253356 Direct memory access (DMA) request controlling arrangement including sample and hold circuits and capable of handling immediately successive DMA requests
10/12/1993US5253355 Apparatus and method for developing wait states during addressing operation by using unused address bits
10/12/1993US5253348 Method of arbitration for buses operating at different speeds
10/12/1993US5253347 Centralized arbitration system using the status of target resources to selectively mask requests from master units
10/12/1993US5253346 Method and apparatus for data transfer between processor elements
10/12/1993US5253345 Point of sale register system
10/12/1993US5253343 Method for the management of a memory of messages in a station of a data transmission network, and station designed for the implementation of the method
10/12/1993US5252951 Graphical user interface with gesture recognition in a multiapplication environment
10/12/1993CA1323112C Data processing system with memory-access priority control
10/12/1993CA1323111C System for restructuring input/output control system
10/09/1993CA2093267A1 System of contact free data exchange between a terminal and a modular portable set
10/06/1993EP0564256A2 Serialisation of resource access requests for interrupts and processes
10/06/1993EP0564118A1 Serial data transfer apparatus and method
10/06/1993EP0564116A1 Arbitratian control between host system and connected subsystem
10/06/1993EP0563623A2 Communicating messages between processors and a coupling facility
10/06/1993EP0563518A2 Command quiesce function
10/06/1993EP0563511A2 Decoder for data-streams in a synchronous digital hierarchical system
10/06/1993EP0563492A2 Data distribution network with improved broadcast feature
10/05/1993US5251318 Multiprocessing system comparing information copied from extended storage before and after processing for serializing access to shared resource
10/05/1993US5251312 Method and apparatus for the prevention of race conditions during dynamic chaining operations
10/05/1993US5251307 Channel apparatus with a function for converting virtual address to real address
10/05/1993US5251305 Apparatus and method for preventing bus contention among a plurality of data sources
10/05/1993US5251303 System for DMA block data transfer based on linked control blocks
10/05/1993US5251152 Storage and display of historical LAN traffic statistics
10/05/1993US5251097 Packaging architecture for a highly parallel multiprocessor system
10/05/1993US5250943 GVT-NET--A Global Virtual Time Calculation Apparatus for Multi-Stage Networks
09/1993
09/30/1993WO1993019427A1 Interactive advertising system for on-line terminals
09/30/1993WO1993019424A1 System and method for supporting a multiple width memory subsystem
09/30/1993WO1993019423A1 Data collection interface system
09/30/1993WO1993019422A1 Fiber optic memory coupling system
09/30/1993DE4303775A1 Facsimile device transmission system - stores coded data transmitted to allow retransmission when transmission fault is detected at reception side
09/30/1993DE4208730A1 Access to common memory by multiple units of micro-control system e.g. in LAN,WAN - has central controller with register priority access circuit and timing control for organising connection
09/30/1993CA2132719A1 Interactive advertising system for on-line terminals
09/30/1993CA2132097A1 Fiber optic memory coupling system
09/29/1993EP0562885A2 Microprocessor with hardware controlled power mangement and selectable input/output control pins