Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
06/1993
06/30/1993EP0549139A1 Programmable memory timing
06/30/1993EP0549052A2 An apparatus featuring a feedback signal for controlling a powering voltage for asynchronous electronic circuitry therein
06/30/1993EP0549032A1 Transmissionsystem with circuit for the detection of the modification of identifying codewords in cyclically arriving data-blocks
06/30/1993EP0548550A2 Application specific integrated circuit for shared memory controller
06/30/1993EP0548382A1 Method and device for on-line exchanging of circuit modules in a bus system
06/30/1993EP0548286A1 User interface for television schedule system
06/30/1993EP0548077A1 High speed active bus
06/30/1993CN1073788A Remote dictionary maintenance stystem in server-client computer system
06/30/1993CN1073644A Case
06/29/1993US5224214 BuIffet for gathering write requests and resolving read conflicts by matching read and write requests
06/29/1993US5224213 Ping-pong data buffer for transferring data from one data bus to another data bus
06/29/1993US5224205 Method of combining architecturally dissimilar computing networks into a single logical network
06/29/1993US5224124 Data transmission system
06/29/1993US5224098 Compensation for mismatched transport protocols in a data communications network
06/29/1993US5224093 For use in a data packet switch
06/29/1993US5223827 Process and apparatus for managing network event counters
06/29/1993CA1319761C Asynchronous microprocessor random access memory arbitration controller
06/29/1993CA1319760C Method for providing notification of classified electronic message delivery restriction
06/29/1993CA1319759C Method for shared mail object user dependent status indication
06/29/1993CA1319754C Fault tolerant digital data processor with improved peripheral device interface
06/24/1993WO1993012499A1 Open office directory database views
06/24/1993WO1993012487A1 Input/output subsystem for the multi-processor
06/24/1993WO1993012486A1 Direct memory access interface for buses of different width
06/24/1993WO1993012485A1 Controller of multiple transfer of data between a plurality of memories and a computer bus
06/24/1993CA2086050A1 Method for reducing the number of bits in a binary word representing a series of addresses
06/23/1993EP0547976A1 Controller for multiple data transfers between a plurality of memories and a computer bus
06/23/1993EP0547776A2 Method and apparatus for predicting transmission system errors and failures
06/23/1993EP0547759A2 Non supervisor-mode cross-address space dynamic linking
06/23/1993EP0547758A2 Optional refresh
06/23/1993EP0547459A1 Partial word to full word parallel data shifter
06/23/1993EP0547246A1 Microprocessor architecture capable of supporting multiple heterogeneous processors
06/23/1993CN1021380C Command delivery for computing system
06/22/1993US5222241 Digital signal processor having duplex working registers for switching to standby state during interrupt processing
06/22/1993US5222227 Direct memory access controller for a multi-microcomputer system
06/22/1993US5222223 Method and apparatus for ordering and queueing multiple memory requests
06/22/1993US5222219 Pipeline computer system having write order preservation
06/22/1993US5222218 System with devices connected in sequence to receive information in a predetermined order
06/22/1993US5222216 High performance communications interface for multiplexing a plurality of computers to a high performance point to point communications bus
06/22/1993US5222134 Secure system for activating personal computer software at remote locations
06/22/1993CA1319444C Apparatus and method for a data processing system having a peer relationship among a plurality of central processing units
06/22/1993CA1319443C Modular expansion bus configuration
06/22/1993CA1319442C Applications processor for a craft access system
06/22/1993CA1319441C Programmable interrupt controller
06/22/1993CA1319421C Memory controller as for a video signal processor
06/19/1993CA2084950A1 Compact programmable processing module
06/17/1993DE4140571A1 Control circuitry for digital data traffic - couples unidirectional interface to bidirectional interface for parallel transmissions
06/16/1993EP0546855A1 Multi-mode input/output circuit and module, and process control system using same
06/16/1993EP0546605A1 Communication system
06/16/1993EP0546354A2 Interprocessor communication system and method for multiprocessor circuitry
06/16/1993CN2136495Y General computer bus structure
06/15/1993USRE34282 Memory control system
06/15/1993US5220659 System for matching data recovery time between different devices by extending a cycle upon detecting end of cycle
06/15/1993US5220654 Method and system for managing an operating system definition of a dynamically modifiable i/o configuration
06/15/1993US5220653 Scheduling input/output operations in multitasking systems
06/15/1993US5220651 Cpu-bus controller for accomplishing transfer operations between a controller and devices coupled to an input/output bus
06/15/1993US5220635 Data sink having high efficiency in received data processing
06/15/1993US5220603 Access control in a distributed computer system
06/15/1993US5220566 Multiplexer for use in data processing system
06/15/1993US5220516 Asynchronous staging of objects between computer systems in cooperative processing systems
06/15/1993US5220211 High speed bus transceiver with fault tolerant design for hot pluggable applications
06/15/1993CA1319199C Bus data path control scheme
06/14/1993CA2084760A1 Multi-mode input/output circuit and module, and process control system using same
06/13/1993CA2078913A1 Interprocessor communication system and method for multiprocessor circuitry
06/10/1993WO1993011481A1 Process for generating a common time base for a system with decentralised computing units
06/09/1993EP0545907A2 Improved synchronous/asynchronous modem
06/09/1993EP0545822A2 A common file access system and a common file access method in a distributed memory type computer system
06/09/1993EP0545684A2 Low-cost system for modeling player position and movement in a virtual reality system
06/09/1993EP0545675A1 Computer system with automatic adapter card setup
06/09/1993EP0545581A2 Integrated data processing system including CPU core and parallel, independently operating DSP module
06/09/1993EP0545575A1 Multiple virtual FIFO arrangement
06/09/1993EP0545482A1 Arbiter with a uniformly partitioned architecture
06/09/1993EP0545001A2 Failure detection in a redundant duplex system
06/09/1993EP0544963A1 Parallel processing method for receiving and transmitting HDLC/SDLC bit streams
06/09/1993DE4240543A1 Data transfer circuit for integrated circuit test appts. - has masking circuit between test system and hardware to maintain transfer with different clock rates
06/09/1993DE4239968A1 Data transmission system for host computer and peripherals - has direct memory access controller operating with interface to control transfers
06/09/1993DE4140017A1 Verfahren zur erzeugung einer globalen zeitbasis und datenverarbeitungsanlage mit verteilten rechnerknoten Process for the production of a global time base and data processing system with distributed computer nodes
06/09/1993CN1021152C Storage arbiter method for using in subsystem of video
06/09/1993CN1021147C Multiprocessor controller having shared control store
06/09/1993CN1021146C Arrangements for handling data of use CPU
06/08/1993US5218707 Integrated circuit with remappable interrupt pins
06/08/1993US5218703 Circuit configuration and method for priority selection of interrupts for a microprocessor
06/08/1993US5218702 System for selecting request for a resource before decoding of requested resource address and validating selection thereafter
06/08/1993US5218690 Vme-multibus ii interface adapter for protocol conversion and for monitoring and discriminating accesses on the multibus ii system bus
06/08/1993US5218688 Data processing system with memory-access priority control
06/08/1993US5218686 Combined synchronous and asynchronous memory controller
06/08/1993US5218683 Method and apparatus for concealing the enablement of a device by modifying a status word
06/08/1993US5218682 Two-way handshake circuit and method for communication between processors
06/08/1993US5218681 Apparatus for controlling access to a data bus
06/08/1993US5218678 System and method for atomic access to an input/output device with direct memory access
06/08/1993US5218677 Computer system high speed link method and means
06/08/1993US5218676 Dynamic routing system for a multinode communications network
06/08/1993US5218458 For transferring data from computer to computer
06/08/1993US5218248 Bus drive circuit for use in communications
06/08/1993CA1318979C Method and circuit for automatically communicating in two modes through a backplane
06/02/1993EP0543882A1 System and method for monitoring copiers from a remote location
06/02/1993CN1021090C Electronic system having a plurality of removable units
06/02/1993CN1021088C Method of thransferring information for virtual computer system
06/01/1993US5216667 Simultaneous bidirectional transceiver
06/01/1993US5216300 Output buffer for semiconductor integrated circuit
05/1993
05/30/1993CA2079503A1 Multiple virtual fifo arrangement