Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
11/1993
11/25/1993WO1993023813A1 Data processing equipment with an application-specific outfit
11/25/1993WO1993023812A1 Enhanced parallel port
11/25/1993WO1993023811A2 Open architecture interface storage controller
11/25/1993WO1993023810A1 Scalable coprocessor
11/25/1993WO1993023809A1 Isdn-based high speed communication system
11/24/1993EP0571099A1 Bus architecture for integrated data and video memory
11/24/1993EP0571093A2 Integrated circuit printhead for an ink jet printer including an integrated identification circuit
11/24/1993EP0570892A1 Computer peripheral devices interconnection
11/24/1993EP0570827A1 System and method for rotational position sensing miss avoidance in direct access storage device
11/24/1993EP0570683A2 Network server for local and remote resources
11/24/1993EP0570648A1 Apparatus for generating and checking the error correction codes of messages in a message switching system
11/24/1993EP0570557A1 Process for generating a common time base for a system with decentralised computing units
11/24/1993EP0300516B1 Digital data processing system
11/24/1993CN2147266Y Pile measuring device with digital storage remote controller
11/23/1993US5265257 Fast arbiter having easy scaling for large numbers of requesters, large numbers of resource types with multiple instances of each type, and selectable queuing disciplines
11/23/1993US5265255 Personal computer system with interrupt controller
11/23/1993US5265252 Device driver system having generic operating system interface
11/23/1993US5265243 Processor interface controller for interfacing peripheral devices to a processor
11/23/1993US5265241 Method and apparatus for verifying the configuration of a link-connected network
11/23/1993US5265239 Method for remotely accessing service programs of a local processing system supporting multiple protocol stacks and multiple device drivers
11/23/1993US5265238 Automatic device configuration for dockable portable computers
11/23/1993US5265237 Byte swapping apparatus for selectively reordering bytes of an N-bit word communicated between an at computer and VME bus
11/23/1993US5265229 Single load, multiple issue queue with error recovery capability
11/23/1993US5265228 Apparatus for transfer of data units between buses
11/23/1993US5265223 Preservation of priority in computer bus arbitration
11/23/1993US5265218 Bus architecture for integrated data and video memory
11/23/1993US5265216 High performance asynchronous bus interface
11/23/1993US5265215 Multiprocessor system and interrupt arbiter thereof
11/23/1993US5265212 Sharing of bus access among multiple state machines with minimal wait time and prioritization of like cycle types
11/23/1993US5265211 Arbitration control logic for computer system having dual bus architecture
11/23/1993US5265103 Data communications system
11/23/1993US5265053 Main memory DRAM interface
11/23/1993US5265033 ATM/POS based electronic mail system
11/23/1993US5264842 Communication switching system
11/23/1993CA1324683C Efficient protocol for communicating between asynchronous devices
11/23/1993CA1324679C Method and means for interfacing a system control unit for a multi-processor system with the system main memory
11/18/1993EP0570319A2 Asynchronous full-duplex communication using two half-duplex channels with software handshaking
11/18/1993EP0570220A2 Acknowledgment protocol for serial data network with out-of-order delivery
11/18/1993EP0570143A2 Method and apparatus for interfacing a serial data signal
11/18/1993EP0569900A1 Automatic slot identification and address decoding system
11/18/1993EP0569512A1 Packet transmission system and method utilizing both a data bus and dedicated control lines
11/18/1993EP0265454B1 Data transfer system comprising means for detecting transmission errors
11/18/1993DE4319985A1 Bus signal manipulation apparatus - has element which implements adjustment, erasure, enlargement or conversion of signals
11/16/1993US5263172 Multiple speed synchronous bus having single clock path for providing first or second clock speed based upon speed indication signals
11/16/1993US5263169 Bus arbitration and resource management for concurrent vector signal processor architecture
11/16/1993US5263163 Arbitration among multiple users of a shared resource
11/16/1993US5263157 Method and system for providing user access control within a distributed data processing system by the exchange of access control profiles
11/16/1993US5263148 Method and apparatus for configuration of computer system and circuit boards
11/16/1993US5263146 Multiprocessor system including an exclusive access controller with lock request holding and grant circuits
11/16/1993US5263145 Method and means for accessing DASD arrays with tuned data transfer rate and concurrency
11/16/1993US5263142 Input/output cache with mapped pages allocated for caching direct (virtual) memory access input/output data based on type of I/O devices
11/16/1993US5263139 Multiple bus architecture for flexible communication among processor modules and memory subsystems and specialized subsystems
11/16/1993US5263138 Method and apparatus for arbitrating access to a high speed digital video bus
11/16/1993US5262991 Device with multiplexed and non-multiplexed address and data I/O capability
11/16/1993CA2007834C Path learning feature for an automated telemarketing system
11/11/1993WO1993022730A1 Signal routing circuit for microprocessor upgrade socket
11/11/1993WO1993022729A1 Configurable split scsi system
11/11/1993CA2112752A1 Signal routing circuit for microprocessor upgrade socket
11/10/1993EP0569290A1 Flight data processor
11/10/1993EP0568678A1 Device for transmission of data
11/10/1993CN1078337A Serial network topology denerator
11/10/1993CN1078336A Communications system
11/10/1993CN1022724C Nonsynchronous channel/DASD Communication system
11/10/1993CN1022723C Two-way data transfer device
11/09/1993US5261114 Method and apparatus for providing down-loaded instructions for execution by a peripheral controller
11/09/1993US5261110 System for performing writes to non-volatile memory elements in a minimal time
11/09/1993US5261109 Distributed arbitration method and apparatus for a computer bus using arbitration groups
11/09/1993US5261108 Multiprocessor communications register providing complete access in a full access mode, and mapped access in a partial access mode
11/09/1993US5261107 Programable interrupt controller
11/09/1993US5261105 System for transferring blocks of data among diverse units having cycle identifier signals to identify different phase of data transfer operations
11/09/1993US5261092 Synchronizing slave processors through eavesdrop by one on periodic sync-verify messages directed to another followed by comparison of individual status
11/09/1993US5261083 Floppy disk controller interface for suppressing false verify cycle errors
11/09/1993US5261079 Data processing system
11/09/1993US5261077 Configurable data path arrangement for resolving data type incompatibility
11/09/1993US5261073 In an information processing system
11/09/1993US5261060 Eight-bit parallel communications method and apparatus
11/09/1993US5261059 Crossbar interface for data communication network
11/09/1993US5261057 I/O bus to system interface
11/09/1993US5261056 N-port wide bandwidth cross-link register
11/09/1993US5261055 Externally updatable ROM (EUROM)
11/09/1993US5261047 Bus arbitration scheme for facilitating operation of a printing apparatus
11/09/1993US5260933 Acknowledgement protocol for serial data network with out-of-order delivery
11/09/1993CA2020522C Apparatus and method for loading bios from a diskette in a personal computer system
11/09/1993CA2020521C Apparatus and method for decreasing the memory requirements for bios in a personal computer system
11/09/1993CA1324220C Consolidation of commands in a buffered input/output device
11/09/1993CA1324219C Cross-software development/maintenance system
11/09/1993CA1324192C Controlling responding by users of an intercommunications bus
11/03/1993EP0568479A2 Method and system of establishing parallel conversations in a communications network
11/03/1993EP0568477A2 Method and apparatus for optinum path selection in packet transmission networks
11/03/1993EP0568420A1 Programmable interface, especially for control of domestic appliances
11/03/1993EP0568329A1 Peripheral memory buffer apparatus and method of using same
11/03/1993EP0568099A2 Electronic information processing apparatus
11/03/1993EP0568078A1 External interface for a high performance graphics adapter allowing for graphics compatibility
11/03/1993EP0568002A2 Distribution of communications connections over multiple service access points in a communications network
11/03/1993EP0567563A1 Mixed resolution, n-dimensional object space
11/03/1993EP0478616B1 Method and apparatus for data store connection
11/02/1993US5259006 Method for substantially eliminating hold time violations in implementing high speed logic circuits or the like
11/02/1993US5258982 Method of excluding inactive nodes from two-phase commit operations in a distributed transaction processing system
11/02/1993US5258855 Information processing methodology
11/02/1993US5258655 Apparatus for electrically switching between peripheral devices
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