| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 04/12/1994 | US5303382 Arbiter with programmable dynamic request prioritization |
| 04/12/1994 | US5303360 Programmable boundary between system board memory and slot bus memory |
| 04/12/1994 | US5303353 Data transfer system |
| 04/12/1994 | US5303352 Dual connector port for bus master card |
| 04/12/1994 | US5303351 Error recovery in a multiple 170 channel computer system |
| 04/12/1994 | US5303350 Circuit for initializing registers using two input signals for writing default value into D-latch after a reset operation |
| 04/12/1994 | US5303349 Interface for establishing a number of consecutive time frames of bidirectional command and data block communication between a Host's standard parallel port and a peripheral device |
| 04/12/1994 | US5303348 Method of arbitrating access to a data bus and apparatus therefor |
| 04/12/1994 | US5303347 Attribute based multiple data structures in host for network received traffic |
| 04/12/1994 | US5303345 Method for controlling data sending and receiving operations of a microprocessor |
| 04/12/1994 | US5303243 Network management system capable of easily switching from an active to a backup manager |
| 04/12/1994 | US5303238 Network communications intermediate interface |
| 04/12/1994 | US5303237 Frame relay system capable of handling both voice and data frames |
| 04/12/1994 | US5303235 Automatic detection of reachable network elements |
| 04/12/1994 | US5302947 Method and apparatus for loading a software program from a radio modem into an external computer |
| 04/06/1994 | EP0590967A1 Wait-state control in an information processing system bus |
| 04/06/1994 | EP0590817A1 Screen updating for remote workstation |
| 04/06/1994 | EP0590519A2 An ally mechanism for inter-connecting distributed computing environment (DCE) and non-DCE systems to operate in a network system |
| 04/06/1994 | EP0590302A1 Method and system for data search in a data processing system |
| 04/06/1994 | EP0590212A1 Synchronization apparatus for a synchronous data communication system |
| 04/06/1994 | CN2161025Y Two-wire remote transmission apparatus |
| 04/06/1994 | CN1084986A Exchanging data and clock lines on multiple format data buses |
| 04/05/1994 | USPP8675 White dogwood Tsukuba-No-Mine |
| 04/05/1994 | US5301351 Data transfer control system between high speed main memory and input/output processor with a data mover |
| 04/05/1994 | US5301346 Method and apparatus for transferring data between a host device and plurality of portable computers |
| 04/05/1994 | US5301343 System having microprocessor local memory expansion capability through removable coupling of local memory expansion boards directly to the high speed microprocessor local bus |
| 04/05/1994 | US5301337 Distributed resource management system using hashing operation to direct resource request from different processors to the processor controlling the requested resource |
| 04/05/1994 | US5301335 Register with selective wait feature |
| 04/05/1994 | US5301333 Tree structured variable priority arbitration implementing a round-robin scheduling policy |
| 04/05/1994 | US5301332 Method and apparatus for a dynamic, timed-loop arbitration |
| 04/05/1994 | US5301330 Contention handling apparatus for generating user busy signal by logically summing wait output of next higher priority user and access requests of higher priority users |
| 04/05/1994 | US5301329 In a computer system |
| 04/05/1994 | US5301323 Data processing system including dynamic channel path management |
| 04/05/1994 | US5301316 System for determination of the equivalence of two objects without compromising then done by a third object nominated by one and accetped by the other |
| 04/05/1994 | US5301312 Method and system for utilizing benign fault occurrence to measure interrupt-blocking times |
| 04/05/1994 | US5301306 Circuit for slowing portion of microprocessor operating cycle in all successive operating cycles regardless of whether a slow device is accessed in the portion of any operating cycle |
| 04/05/1994 | US5301303 Communication system concentrator configurable to different access methods |
| 04/05/1994 | US5301294 Address bus control system |
| 04/05/1994 | US5301287 User scheduled direct memory access using virtual addresses |
| 04/05/1994 | US5301284 Mixed-resolution, N-dimensional object space method and apparatus |
| 04/05/1994 | US5301283 Dynamic arbitration for system bus control in multiprocessor data processing system |
| 04/05/1994 | US5301282 Information handling system |
| 04/05/1994 | US5301281 Method and apparatus for expanding a backplane interconnecting bus in a multiprocessor computer system without additional byte select signals |
| 04/05/1994 | US5301279 Apparatus for conditioning priority arbitration |
| 04/05/1994 | US5301278 Flexible dynamic memory controller |
| 04/05/1994 | US5301277 Method and apparatus for communicating peripheral data to/from minor operating systems running as subprocesses on a main operating system |
| 04/05/1994 | US5301276 Method and device for assigning I/O address in data processing apparatus |
| 04/05/1994 | US5301275 Data transfer system with variable data buffer size and programmable interrupt frequency |
| 04/05/1994 | US5301233 Process for the transmission and reception of personalized programs |
| 04/05/1994 | US5301192 Temporary information storage system comprising a buffer memory storing data structured in fixed or variable length data blocks |
| 04/05/1994 | US5301186 High speed transmission line interface |
| 04/05/1994 | US5301089 Parallel processing system |
| 04/05/1994 | US5300943 Multiple display workstation with conductive surface overlay control |
| 04/05/1994 | US5300811 Integrated circuit device and microprocessor constituted thereby |
| 04/02/1994 | CA2107437A1 Information processing system |
| 03/31/1994 | WO1994007318A1 Termination arrangement at an interface at one end of the connectable and disconnectable multi-conductor cable |
| 03/31/1994 | WO1994007202A1 Data processing apparatus |
| 03/31/1994 | WO1994007201A1 A device with host indication combination |
| 03/31/1994 | WO1994007199A1 Dma data path aligner and network adaptor utilizing same |
| 03/31/1994 | WO1994007198A1 Mass data storage and retrieval system |
| 03/31/1994 | WO1994007196A1 Device interface module for disk drive complex |
| 03/31/1994 | DE4232590A1 Microcomputer groups bus interconnection system - sets time switch when receiver computer drops-out and uses FIFO buffer to simulates storage to enable transfer of data |
| 03/31/1994 | CA2101035A1 Terminal emulation system |
| 03/30/1994 | EP0589743A1 Modular device for coupling and multiplexing different type buses |
| 03/30/1994 | EP0589664A1 Scatter-gather in data processing system |
| 03/30/1994 | EP0589662A2 Digital signal processing system |
| 03/30/1994 | EP0589509A2 Polling-type digital communications system having pseudo-balanced mode |
| 03/30/1994 | EP0589499A1 A multistation communication bus system, and a master station and a slave station for use in such system |
| 03/30/1994 | EP0589447A2 Method for joining a plurality of networks and seceding therefrom |
| 03/30/1994 | EP0588898A1 Method and system for revising data in a distributed data communication system. |
| 03/30/1994 | EP0448624B1 Bus interface controller for computer graphics |
| 03/29/1994 | US5299315 Personal computer with programmable threshold FIFO registers for data transfer |
| 03/29/1994 | US5299314 Network adapter using status inlines and data lines for bi-directionally transferring data between lan and standard p.c. parallel port |
| 03/29/1994 | US5299313 Network interface with host independent buffer management |
| 03/29/1994 | US5299201 Method and apparatus for isolating faults in a network having serially connected links |
| 03/29/1994 | US5299200 Adaptive interface that automatically adjusts for timing skews caused by signal delays |
| 03/29/1994 | US5299196 Distributed address decoding for bus structures |
| 03/29/1994 | US5299189 TDMA processing apparatus |
| 03/29/1994 | US5298921 System for communicating with external device registers via two-byte data packets over a serial bus |
| 03/24/1994 | DE4231580A1 Data transfer between biomagnetic data source and processing system in UNIX (RTM) environment - has interrupt routine for controlling first direct data transfer between buffer and input=output memory, and second direct data transfer between ring buffer memory and target memory |
| 03/23/1994 | EP0588745A1 Multi-media analog/digital/optical switching apparatus |
| 03/23/1994 | EP0588744A1 Device and method for enhanced serial network topology generation |
| 03/23/1994 | EP0588703A1 System for data transmission between a computer bus and a high speed ring network |
| 03/23/1994 | EP0588607A1 Data processing apparatus with improved data throughput |
| 03/23/1994 | EP0588521A1 System and method for regulating access to direct access storage devices in data processing systems |
| 03/23/1994 | EP0588511A2 Method of securing a Lan station personal computer and system |
| 03/23/1994 | EP0588472A1 Personal computer with programmable threshold fifo registers for data transfer |
| 03/23/1994 | EP0588469A1 Personal computer with SCSI bus power control |
| 03/23/1994 | EP0588415A1 Peer to peer connection authorizer |
| 03/23/1994 | EP0588274A1 Serial bus-system having one-wire link |
| 03/23/1994 | EP0588191A1 Exchanging data and clock lines on multiple format data buses |
| 03/23/1994 | EP0588104A2 Multipath torus switching apparatus |
| 03/23/1994 | EP0588084A2 Portable computer having dedicated register group and peripheral controller bus between system bus and peripheral controller |
| 03/23/1994 | EP0588077A2 Compact electronic apparatus and method of assembling the same |
| 03/23/1994 | EP0588046A1 IEEE standard 802.2 virtual device driver |
| 03/23/1994 | EP0588030A2 Master microchannel apparatus for converting to switch architecture |
| 03/23/1994 | EP0588025A2 Switch-based microchannel planar apparatus |
| 03/23/1994 | EP0588021A2 Switch-based personal computer interconnection apparatus |
| 03/23/1994 | EP0587918A1 Multiprocessorsystem with caches |
| 03/23/1994 | EP0587865A1 Sharing of bus access among multiple state machines with minimal wait time and prioritization of like cycle types. |