Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/1995
12/26/1995US5479112 Logic gate with matched output rise and fall times and method of construction
12/26/1995US5479111 Signal transmitting device in a semiconductor apparatus
12/26/1995US5479107 Asynchronous logic circuit for 2-phase operation
12/26/1995US5479055 Electronic circuit assembly an a substrate containing programmable switches
12/26/1995US5479005 Low-power consumption bi-CMOS circuit formed by a small number of circuit components
12/21/1995WO1995034954A1 Signal receiving circuit and digital signal processing system
12/20/1995EP0653123A4 Logic cell for field programmable gate array having optional input inverters.
12/20/1995EP0611497A4 Adaptive programming method for antifuse technology.
12/19/1995US5477543 Structure and method for shifting and reordering a plurality of data bytes
12/19/1995US5477180 Circuit and method for generating a clock signal
12/19/1995US5477173 Ultra low power gain circuit (UGC)
12/19/1995US5477172 Configurable input buffer dependent on supply voltage
12/19/1995US5477169 Logic circuit with negative differential resistance device
12/19/1995US5477167 Programmable application specific integrated circuit using logic circuits to program antifuses therein
12/19/1995US5477166 Programmable output device with integrated circuit
12/19/1995US5477165 Programmable logic module and architecture for field programmable gate array device
12/19/1995US5477164 Adiabatic dynamic noninverting circuitry
12/14/1995WO1995034132A1 High swing interface stage
12/13/1995EP0687071A1 Device including a circuit having dynamic logic stages
12/13/1995EP0687070A2 Level conversion circuit
12/13/1995EP0687069A1 Pulse generation
12/13/1995EP0687068A2 Output driver for use in semiconductor integrated circuit
12/13/1995EP0686975A1 Data output buffer circuit for semiconductor integrated circuit
12/13/1995EP0686920A2 High speed serial link for fully duplexed data communication
12/13/1995EP0650631A4 Non-disruptive, randomly addressable memory system.
12/13/1995EP0437491B1 Method of using electronically reconfigurable gate array logic and apparatus formed thereby
12/13/1995CN1113365A BiCMOS ECL-CMOS level converter
12/12/1995US5475830 Structure and method for providing a reconfigurable emulation circuit without hold time violations
12/12/1995US5475345 Ultra-fast MOS device circuits
12/12/1995US5475330 Integrated circuit with voltage setting circuit
12/12/1995US5475321 Semiconductor integrated circuit
12/07/1995WO1995033264A1 Improved data output buffer
12/06/1995EP0685942A2 Low energy differential logic gate circuitry having substantially invariant clock signal loading
12/06/1995EP0685941A2 Bootstrap circuit
12/06/1995EP0685887A1 A device for selecting design options in an integrated circuit
12/06/1995EP0685808A1 Computing device
12/06/1995EP0685807A1 Semiconductor integrated circuit
12/06/1995EP0685806A1 Semiconductor device
12/05/1995US5473500 Electrostatic discharge circuit for high speed, high voltage circuitry
12/05/1995US5473272 Digital differential amplifier switching stage with current switch
12/05/1995US5473271 Microprocessor output driver
12/05/1995US5473270 Adiabatic dynamic precharge boost circuitry
12/05/1995US5473269 Adiabatic dynamic logic
12/05/1995US5473268 Intermediary circuit between a low voltage logic circuit and a high voltage output stage in standard CMOS technology
12/05/1995US5473267 Programmable logic device with memory that can store routing data of logic data
12/05/1995US5473266 Programmable logic device having fast programmable logic array blocks and a central global interconnect array
12/05/1995US5473263 Negative feedback to reduce voltage oscillation in CMOS output buffers
11/1995
11/30/1995WO1995032507A1 Programmable logic device with verify circuitry for classifying fuse link states as validly closed, validly open or invalid
11/29/1995EP0684550A1 Method for parallel processing of fuzzy logic inference rules and corresponding circuit architecture
11/29/1995EP0684549A1 Method for parallel processing of fuzzy logic inference rules and corresponding circuit architecture with fuzzy inputs and outputs
11/29/1995EP0683937A1 Output driver
11/28/1995US5471630 Data processor with quicker latch input timing of valid data
11/28/1995US5471498 High-speed low-voltage differential swing transmission line transceiver
11/28/1995US5471484 Method and apparatus for testing digital signals
11/28/1995US5471161 Circuit for calculating the minimum value
11/28/1995US5471160 Sense amplifier including comparator
11/28/1995US5471156 Device and method for binary-multilevel operation
11/28/1995US5471155 User programmable product term width expander
11/28/1995US5471150 Buffer with high and low speed input buffers
11/28/1995US5471149 High-speed large output amplitude voltage level shifting circuit
11/23/1995DE19515789A1 Bootstrap circuit with capacitors between input and output lines
11/22/1995EP0683565A1 Programmable logic module and architecture for field programmable gate array device
11/22/1995EP0683564A1 Current switching circuit
11/22/1995EP0683524A1 Base cell for BiCMOS and CMOS gate arrays
11/21/1995US5469368 Array of configurable logic blocks each including a first lookup table output coupled to selectively replace an output of second lookup with an alternate function output
11/21/1995US5469163 Multiple resonant tunneling circuits for positive digit range-4 base-2 to binary conversion
11/21/1995US5469109 Method and apparatus for programming anti-fuse devices
11/21/1995US5469097 Translator circuit with symmetrical switching delays
11/21/1995US5469088 Cascade array cell partitioning for a sense amplifier of a programmable logic device
11/21/1995US5469086 Floating detection circuit
11/21/1995US5469084 BiCMOS output driver
11/21/1995US5469082 Peripheral component interfacing system with bus voltage/logic supply comparison means
11/21/1995US5469081 Circuit for interconnecting integrated semiconductor circuits
11/21/1995US5469080 Low-power, logic signal level converter
11/21/1995US5469078 Programmable logic device routing architecture
11/21/1995US5469077 Field programmable antifuse device and programming method therefor
11/21/1995US5469076 Static current testing apparatus and method for current steering logic (CSL)
11/21/1995US5469003 Hierarchically connectable configurable cellular array
11/16/1995WO1995031043A2 Semiconductor device for the summation of a number of weighted input signals
11/16/1995WO1995031042A1 Nmos output buffer having a controlled high-level output
11/16/1995WO1995031041A1 Integrated circuit comprising an output stage with a miller capacitor
11/16/1995WO1995030952A1 Programmable logic device with regional and universal signal routing
11/16/1995CA2166555A1 Semiconductor device
11/15/1995EP0389584B1 Transistor breakdown protection circuit
11/15/1995CN1111824A Semiconductor integral circuit apparatus
11/14/1995US5467369 AUI to twisted pair loopback
11/14/1995US5467315 Semiconductor memory device facilitated with plural self-refresh modes
11/14/1995US5467313 Level shifter and data output buffer having same
11/14/1995US5467298 Multivalued adder having capability of sharing plural multivalued signals
11/14/1995US5467054 Output circuit for multibit-outputting memory circuit
11/14/1995US5467050 Dynamic biasing circuit for semiconductor device
11/14/1995US5467048 Semiconductor device with two series-connected complementary misfets of same conduction type
11/14/1995US5467044 CMOS input circuit with improved supply voltage rejection
11/14/1995US5467031 3.3 volt CMOS tri-state driver circuit capable of driving common 5 volt line
11/14/1995US5467029 OR array architecture for a programmable logic device
11/14/1995US5467026 Method for minimizing current flow through a logic gate
11/14/1995US5467015 Superconducting magnetometer having increased bias current tolerance and producing digital output
11/14/1995US5466975 Switched termination for bus tap-off line
11/08/1995EP0681370A1 Output circuit for integrated circuit
11/08/1995EP0681329A2 A customizable logic array device