Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
10/1996
10/22/1996US5568068 Buffer circuit for regulating driving current
10/22/1996US5568067 Configurable XNOR/XOR element
10/22/1996US5568066 Sense amplifier and or gate for a high density programmable logic device
10/22/1996US5568065 Circuit for connecting a node to a voltage source selected from alternative voltage sources
10/22/1996US5568064 Bidirectional transmission line driver/receiver
10/22/1996US5568063 Signal transmitting device, circuit block and integrated circuit suited to fast signal transmission
10/22/1996US5568062 Low noise tri-state output buffer
10/22/1996US5568060 Circuit board insertion circuitry for high reliability backplanes
10/17/1996WO1996032778A2 Level-shifting circuit and high-side driver including such a level-shifting circuit
10/16/1996EP0738044A1 Reduced power PLA
10/16/1996EP0738043A1 Low voltage emitter-coupled logic circuit
10/16/1996EP0738042A1 Low power pre-discharged rationed logic circuit
10/16/1996EP0737643A1 Voltage generator-booster for supplying an approximately constant voltage level
10/15/1996US5566123 Synchronous dual port ram
10/15/1996US5565808 Latch control circuit
10/15/1996US5565806 Input/output interface circuit for digital and/or analog signals
10/15/1996US5565798 Self-timed control circuit for self-resetting logic circuitry
10/15/1996US5565796 Bus drive circuit, receiver circuit, and bus system
10/15/1996US5565795 Level converting circuit for reducing an on-quiescence current
10/15/1996US5565794 Voltage range tolerant CMOS output buffer with reduced input capacitance
10/15/1996US5565793 Programmable logic array integrated circuit devices with regions of enhanced interconnectivity
10/15/1996US5565792 Macrocell with product-term cascade and improved flip flop utilization
10/15/1996US5565791 Method and apparatus for disabling unused sense amplifiers
10/15/1996US5565695 Magnetic spin transistor hybrid circuit element
10/15/1996US5565386 Method of connecting to integrated circuitry
10/10/1996WO1996031950A1 Logic cell and routing architecture in a field programmable gate array
10/10/1996DE19518553A1 ESD protection circuit connected CMOS output buffer for integrated circuit
10/10/1996DE19518550A1 Input ESD protection circuit for CMOS integrated circuit
10/09/1996EP0736976A1 Inverter circuit
10/09/1996CN1132937A Electrostatic discharge protection circuit for integrated circuit
10/09/1996CN1132936A Electrostatic discharge protection circuit
10/08/1996US5563542 Output circuit for gunning transceiver logic
10/08/1996US5563539 Output buffer circuit changeable of the output signal from a low to a high impedance state
10/08/1996US5563532 Double filtering glitch eater for elimination of noise from signals on a SCSI bus
10/08/1996US5563530 Multi-function resonant tunneling logic gate and method of performing binary and multi-valued logic
10/08/1996US5563529 High speed product term allocation structure supporting logic iteration after committing device pin locations
10/08/1996US5563528 Multiplexer for programmable logic device
10/08/1996US5563527 Power-managed sense amplifier for programmable logic device
10/08/1996US5563526 Programmable mixed-mode integrated circuit architecture
10/03/1996WO1996031006A1 Ecl level/cmos level logic signal interfacing device
10/03/1996WO1996031005A1 Output characteristics stabilization of cmos devices
10/03/1996WO1996031004A1 Dual feature input/timing pin
10/02/1996EP0735688A2 Adiabatic logic
10/02/1996EP0735687A2 Output driver with programmable drive characteristics
10/02/1996EP0735686A1 Three-state CMOS output buffer circuit
10/02/1996EP0735685A2 Programmable power reduction circuit for programmable logic device
10/02/1996EP0735684A2 BiCMOS logical integrated circuit
10/02/1996EP0735683A2 Logic gate circuit and digital integrated circuit
10/02/1996EP0735677A1 Oscillator circuit having oscillation frequency independent from the supply voltage value
10/02/1996EP0735676A1 Predriver circuit for high current loads
10/02/1996EP0735587A2 BiMOS integrated circuit
10/02/1996EP0735493A1 Bus driver circuit
10/02/1996EP0735451A2 Adjustable reset threshold for an integrated regulator
10/02/1996EP0734573A1 Application specific modules in a programmable logic device
10/02/1996CN1132421A Mode setting circuit and mode setting apparatus
10/02/1996CN1132371A Semiconductor device, and operating device, signal converter, and signal processing system using the semiconductor device
10/02/1996CN1132370A Semiconductor device, and operating device, signal converter, and signal processing system using the semiconductor device
10/01/1996US5561773 Programmable, multi-purpose virtual pin multiplier
10/01/1996US5561694 Self-timed driver circuit
10/01/1996US5561634 Input buffer of semiconductor memory device
10/01/1996US5561631 High-speed minimal logic self blank checking method for programmable logic device
10/01/1996US5561388 Semiconductor device having CMOS circuit and bipolar circuit mixed
10/01/1996US5561384 Integrated circuit
10/01/1996US5561382 Bi-CMOS output buffer circuit for CMOS-to-ECL conversion
10/01/1996US5561367 Structure and method for testing wiring segments in an integrated circuit device
10/01/1996US5561300 Atomic switching devices and logical circuits
10/01/1996CA2172096A1 Adiabatic logic
09/1996
09/25/1996EP0734134A2 Method and structure for synchronization of asynchronous signals
09/25/1996EP0733290A1 Fault tolerant digital transmission system
09/25/1996EP0733285A1 Combined programmable logic array and array logic
09/24/1996US5559996 Level converter including wave-shaping circuit and emulator microcomputer incorporating the level converter
09/24/1996US5559971 Folded hierarchical crosspoint array
09/24/1996US5559966 Method and apparatus for interfacing a bus that operates at a plurality of operating potentials
09/24/1996US5559751 Electrically configurable integrated circuit configuration using clocked data
09/24/1996US5559464 Signal voltage level conversion circuit and output buffer circuit
09/24/1996US5559463 Low power clock circuit
09/24/1996US5559461 Drive circuit detecting slow signal transition
09/24/1996US5559453 Interlocked restore circuit
09/24/1996US5559452 N channel output driver with boosted gate voltage
09/24/1996US5559451 Bicmos push-pull type logic apparatus with voltage clamp circuit and clamp releasing circuit
09/24/1996US5559450 Field programmable gate array with multi-port RAM
09/24/1996US5559449 Programmable logic array structure for semiconductor nonvolatile memories, particularly flash-eeproms
09/24/1996US5559447 Output buffer with variable output impedance
09/24/1996US5559441 Transmission line driver with self adjusting output impedance
09/24/1996US5559353 Integrated circuit structure having at least one CMOS-NAND gate and method for the manufacture thereof
09/18/1996EP0732830A2 Circuit for clock signal extraction from a high speed data stream
09/18/1996EP0732796A2 VBB reference for pumped substrates
09/18/1996EP0628226A4 BiCMOS LOGIC CIRCUIT.
09/18/1996EP0389566B1 Improved low power dual-mode cmos bias voltage generator
09/17/1996US5557633 Integrated multi-port repeater having shared resources
09/17/1996US5557581 Logic and memory circuit with reduced input-to-output signal propagation delay
09/17/1996US5557236 Integrated circuit with bidirectional pin
09/17/1996US5557235 Semiconductor device comprising a grounding pad near a reference signal pad and a capacitor between the pads
09/17/1996US5557231 Semiconductor device with improved substrate bias voltage generating circuit
09/17/1996US5557229 Apparatus and method for producing an output signal from a memory array
09/17/1996US5557223 For providing binary signals from a data system to a transmission line
09/17/1996US5557221 Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation
09/17/1996US5557219 Interface level programmability
09/17/1996US5557218 Reprogrammable programmable logic array
09/17/1996US5557217 High-density erasable programmable logic device architecture using multiplexer interconnections
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