| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 03/07/1995 | US5396114 Circuit for generating substrate voltage and pumped-up voltage with a single oscillator |
| 03/07/1995 | US5396108 Latch controlled output driver |
| 03/02/1995 | WO1995006357A1 Interface circuits between powered down devices and a bus |
| 03/01/1995 | EP0641077A2 Fixed logic level circuit with ESD protection |
| 03/01/1995 | EP0640974A2 Reference voltage generation circuit |
| 02/28/1995 | US5394103 Field programmable gate array |
| 02/28/1995 | US5394038 Output circuit comprising bipolar transistors for driving CMOS circuit to reduce power consumption of the output circuit and avoid erroneous operation of the CMOS circuit |
| 02/28/1995 | US5394034 Programmable logic array having programmable output driver drive capacity |
| 02/28/1995 | US5394033 Structure and method for implementing hierarchical routing pools in a programmable logic circuit |
| 02/28/1995 | US5394031 Apparatus and method to improve programming speed of field programmable gate arrays |
| 02/28/1995 | US5394030 Programmable logic device |
| 02/22/1995 | EP0639912A1 Method and apparatus for impedance matching of a transmitter and/or receiver |
| 02/22/1995 | EP0639816A2 Field programmable digital signal processing array integrated circuit |
| 02/22/1995 | EP0267271B1 In-system programmable logic device |
| 02/21/1995 | US5392423 Universal pipeline latch for mousetrap logic circuits |
| 02/21/1995 | US5392296 Testing circuit provided in digital logic circuits |
| 02/21/1995 | US5392221 Procedure to minimize total power of a logic network subject to timing constraints |
| 02/21/1995 | US5391948 Surge-resistant protection circuit for vehicle |
| 02/21/1995 | US5391945 Circuit and method for providing phase synchronization of ECL and TTL/CMOS signals |
| 02/21/1995 | US5391943 Gate array cell with predefined connection patterns |
| 02/21/1995 | US5391942 Clock distribution scheme for user-programmable logic array architecture |
| 02/21/1995 | US5391941 Decoder circuitry with balanced propagation delay and minimized input capacitance |
| 02/21/1995 | US5391940 Pad driver circuit with powered down device protection |
| 02/21/1995 | US5391939 Output circuit of a semiconductor integrated circuit |
| 02/21/1995 | US5391931 Protection of integrated circuit devices |
| 02/21/1995 | US5391905 Integrated logic circuit |
| 02/16/1995 | WO1995005033A1 BiCMOS CURRENT MODE DRIVER AND RECEIVER |
| 02/16/1995 | CA2164523A1 Bicmos current mode driver and receiver |
| 02/15/1995 | EP0639006A1 Multiplexed control pins for in-system programming and boundary scan testing using state machines in a high density programmable logic device |
| 02/15/1995 | EP0626113A4 Self-compensating digital delay semiconductor device with selectable output delays and method therefor. |
| 02/14/1995 | US5390189 Semiconductor integrated circuit |
| 02/14/1995 | US5390140 Signal output circuit operating stably and arrangement of power supply interconnection line therefor in semiconductor integrated circuit device |
| 02/14/1995 | US5390137 Carry transfer apparatus |
| 02/14/1995 | US5389842 Latch-up immune CMOS output driver |
| 02/14/1995 | US5389837 Superconducting flux flow digital circuits |
| 02/14/1995 | US5389836 Branch isolation circuit for cascode voltage switch logic |
| 02/14/1995 | US5389835 Vector logic method and dynamic mousetrap logic gate for a self-timed monotonic logic progression |
| 02/14/1995 | US5389834 Output buffer circuit having a DC driver and an AC driver |
| 02/14/1995 | US5389832 Capacitively cross-coupled DCS emitter-follower output stage |
| 02/14/1995 | US5389776 FET-based optical receiver |
| 02/09/1995 | WO1995004404A1 Architecture and interconnect scheme for programmable logic circuits |
| 02/09/1995 | WO1995004403A1 High-speed tristate inverter |
| 02/09/1995 | WO1995004402A1 Microprocessor-based fpga |
| 02/08/1995 | EP0626112A4 Compensated digital delay semiconductor device with selectable output taps and method therefor. |
| 02/07/1995 | US5388068 Superconductor-semiconductor hybrid memory circuits with superconducting three-terminal switching devices |
| 02/07/1995 | US5387828 High-speed level shifter with simple circuit arrangement |
| 02/07/1995 | US5387827 Semiconductor integrated circuit having logic gates |
| 02/07/1995 | US5387826 Overvoltage protection against charge leakage in an output driver |
| 02/02/1995 | DE4425552A1 Wafermaßstabsarchitektur für programmierbare Logikschaltungen Wafer-scale architecture for programmable logic circuits |
| 01/31/1995 | US5386550 Pseudo-LSI device and debugging system incorporating same |
| 01/31/1995 | US5386423 Ordering shift register latches in a scan ring to facilitate diagnosis, testing and isolation |
| 01/31/1995 | US5386393 Fencing circuit and method for isolating spurious noise at system interface |
| 01/31/1995 | US5386392 Programmable high speed array clock generator circuit for array built-in self test memory chips |
| 01/31/1995 | US5386157 MOS output buffer circuit with controlled current source |
| 01/31/1995 | US5386156 Programmable function unit with programmable fast ripple logic |
| 01/31/1995 | US5386155 Apparatus and method for selecting polarity and output type in a programmable logic device |
| 01/31/1995 | US5386154 Compact logic cell for field programmable gate array chip |
| 01/26/1995 | WO1995002859A1 Optimization circuit |
| 01/25/1995 | EP0635943A2 Output stage for digital current switch |
| 01/25/1995 | EP0635942A2 Digital switching stage with current switch |
| 01/25/1995 | EP0635923A1 Circuit for protection against high energy overvoltages with controlled voltage clipping |
| 01/25/1995 | EP0635175A1 Macrocell with product-term cascade and improved flip flop utilization |
| 01/24/1995 | US5384808 Method and apparatus for transmitting NRZ data signals across an isolation barrier disposed in an interface between adjacent devices on a bus |
| 01/24/1995 | US5384738 Semiconductor integrated circuit device |
| 01/24/1995 | US5384736 Data output circuit of a semiconductor memory device |
| 01/24/1995 | US5384732 Semiconductor device comprising a function change over switching circuit having a non-volatile storage device |
| 01/24/1995 | US5384500 Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes |
| 01/24/1995 | US5384499 High-density erasable programmable logic device architecture using multiplexer interconnections |
| 01/24/1995 | US5384498 DC-coupled active pull-down ECL circuit with self-adjusting drive capability |
| 01/24/1995 | US5384497 Low-skew signal routing in a programmable array |
| 01/24/1995 | US5384493 Hi-speed and low-power flip-flop |
| 01/19/1995 | WO1994027204A3 Bias voltage distribution system |
| 01/17/1995 | US5382846 Level shifting circuit for suppressing output amplitude |
| 01/17/1995 | US5382845 Semiconductor circuit for receiving an input signal |
| 01/17/1995 | US5382844 Logic circuit for asynchronous circuits with n-channel logic block and p-channel logic block inverse thereto |
| 01/17/1995 | US5382843 One or two transistor logic with temperature compensation and minimized supply voltage |
| 01/17/1995 | US5382842 Composite logic circuit with bipolar transistor-complementary field effect transistor |
| 01/17/1995 | US5382837 Switching circuit for semiconductor device |
| 01/11/1995 | EP0633665A2 An inverter circuit |
| 01/11/1995 | EP0633664A1 Interface circuit and voltage booster circuit including such circuit |
| 01/10/1995 | US5381062 Multi-voltage compatible bidirectional buffer |
| 01/10/1995 | US5381061 Overvoltage tolerant output buffer circuit |
| 01/10/1995 | US5381060 Differential current switch to super buffer logic level translator |
| 01/10/1995 | US5381059 CMOS tristateable buffer |
| 01/10/1995 | US5381058 FPGA having PFU with programmable output driver inputs |
| 01/10/1995 | US5381057 ECL gate having active pull-down transistor |
| 01/10/1995 | US5381056 CMOS buffer having output terminal overvoltage-caused latch-up protection |
| 01/10/1995 | US5381055 CMOS driver using output feedback pre-drive |
| 01/10/1995 | US5381051 High voltage charge pump |
| 01/10/1995 | US5381044 Bootstrap circuit for driving a power MOS transistor |
| 01/05/1995 | WO1995001087A1 Method and apparatus for non-conductively interconnecting integrated circuits |
| 01/05/1995 | WO1995000921A1 Configurable analog and digital array |
| 01/05/1995 | WO1995000900A1 An ultrafast adder arrangement |
| 01/04/1995 | EP0632596A2 Logic gate circuit formed of semiconductor transistors |
| 01/04/1995 | EP0632595A1 Line-driver-stage in current switch technology |
| 01/04/1995 | EP0632594A2 Latch controlled output driver |
| 01/04/1995 | EP0632591A1 Integrated circuit comprising a noise-reducing output stage |
| 01/04/1995 | EP0632384A1 High speed and programmable array clock generator circuit for abist semiconductor memory chips |
| 01/03/1995 | US5379442 Fast primary and feedback path in a programmable logic circuit |
| 01/03/1995 | US5378945 Voltage level converting buffer circuit |