Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
11/1996
11/26/1996US5578840 Microelectronic integrated circuit structure and method using three directional interconnect routing based on hexagonal geometry
11/21/1996WO1996037047A1 Flexible fpga input/output architecture
11/21/1996WO1996032778A3 Level-shifting circuit and high-side driver including such a level-shifting circuit
11/20/1996EP0743756A1 Configurable integrated circuit
11/20/1996EP0743755A1 Integrated circuit
11/20/1996EP0743648A1 Output stage for integrated circuits, particularly for electronic memories
11/19/1996US5577199 Majority circuit, a controller and a majority LSI
11/19/1996US5576699 Method and apparatus for transferring information by utilizing electron beam
11/19/1996US5576654 BIMOS driver circuit and method
11/19/1996US5576649 Repeater with threshold modulation
11/19/1996US5576642 Electronic system including high performance backplane driver/receiver circuits
11/19/1996US5576641 Output buffer
11/19/1996US5576640 CMOS driver for fast single-ended bus
11/19/1996US5576639 BICMOS level shifter of a semiconductor integrated circuit and data output buffer using the same
11/19/1996US5576638 Level shift circuit with DC component extraction and controlled current mirrors
11/19/1996US5576637 Exclusive or circuit
11/19/1996US5576636 Low power programmable logic arrays
11/19/1996US5576635 Output buffer with improved tolerance to overvoltage
11/19/1996US5576634 Bus driver for high-speed data transmission with waveform adjusting means
11/14/1996WO1996036140A1 Fpga redundancy
11/14/1996WO1996036114A1 Bidirectional transmission line driver/receiver
11/14/1996DE19527736C1 Control circuit for MOSFET in series with switched load
11/14/1996CA2216367A1 Bidirectional transmission line driver/receiver
11/13/1996EP0351983B1 Programmable logic devices with spare circuits for use in replacing defective circuits
11/12/1996US5574940 Data processor with quicker latch input timing of valid data
11/12/1996US5574633 Multi-phase charge sharing method and apparatus
11/12/1996US5574438 Method for transferring information, and in particular for performing a logic operation, using electron beams
11/12/1996US5574397 Signal output circuit operating stably and arrangement of power supply interconnection line therefor in semiconductor integrated circuit device
11/12/1996US5574391 Semiconductor device
11/12/1996US5574390 Method and apparatus for enhanced booting and DC conditions
11/12/1996US5574389 CMOS 3.3 volt output buffer with 5 volt protection
11/12/1996US5574388 Emulation system having a scalable multi-level multi-stage programmable interconnect network
11/07/1996WO1996035263A1 Programmable switch for fpga input/output signals
11/07/1996WO1996035262A1 Floor plan for scalable multiple level interconnect architecture
11/07/1996WO1996035261A1 Scalable multiple level interconnect architecture
11/06/1996EP0741459A2 Off-chip driver for mixed voltage applications
11/06/1996EP0741458A1 Integrated circuit output buffer
11/06/1996EP0741457A1 Integrated circuit
11/06/1996EP0741456A1 Integrated circuit
11/06/1996EP0741455A1 Integrated circuit
11/06/1996EP0741454A1 Integrated circuit
11/06/1996EP0741452A2 Attenuator unit, step attenuator, and electronic apparatus
11/06/1996EP0741422A1 Magnetically controlled logic cell
11/06/1996EP0741354A2 Multi-operand adder using parallel counters
11/06/1996EP0741350A2 Switch capacitor interface circuit
11/06/1996EP0740861A1 Breakdown protection circuit using high voltage detection
11/06/1996EP0740859A1 Electrostatic discharge circuit for high speed, high voltage circuitry
11/06/1996CN1135080A Self-bootstrapping device
11/06/1996CA2148735A1 All-n-logic high-speed single-phase dynamic cmos logic
11/05/1996US5572715 Architecture and circuits for eliminating skews in PLDs
11/05/1996US5572561 Frequency dividing circuit
11/05/1996US5572456 Distributed NOR tag match apparatus
11/05/1996US5572394 CMOS on-chip four-LVTSCR ESD protection scheme
11/05/1996US5572161 Temperature insensitive filter tuning network and method
11/05/1996US5572152 Logic circuit with the function of controlling discharge current on pull-down and emitter coupled logic circuit
11/05/1996US5572151 Pass transistor type selector circuit and digital logic circuit
11/05/1996US5572150 Low power pre-discharged ratio logic
11/05/1996US5572148 Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory
11/05/1996US5572146 Noise attenuation output buffer
11/05/1996US5572145 Method for minimizing ground bounce in digital circuits via time domain shifts
10/1996
10/31/1996WO1996034458A1 Gtl output amplifier for coupling an input signal at the input to a transmission line at the output
10/31/1996WO1996034351A1 Method for designing semiconductor integrated circuit and automatic designing device
10/31/1996WO1996034346A1 Microprocessor with distributed registers accessible by programmable logic device
10/30/1996EP0740421A2 Temperature-compensated piezoelectric oscillator
10/30/1996EP0740419A1 Cross point interconnect structure with reduced area
10/30/1996EP0740418A1 Controllable width OR gate
10/30/1996EP0740344A2 Method and apparatus for coupling multiple independent on-chip Vdd busses to an ESD core clamp
10/30/1996EP0739552A1 BiCMOS CURRENT MODE DRIVER AND RECEIVER
10/30/1996EP0705465B1 Configurable analog and digital array
10/30/1996CN1134629A Arithmetic processing apparatus and arithmetic processing circuit
10/30/1996CN1134624A Differential amplifying apparatus
10/30/1996CN1134565A Semiconductor device semiconductor circuit using device; and correlation calculation device, signal converter, and signal processing system using circuit
10/30/1996CN1134564A Semiconductor device, circuit having device, and correlation calculation apparatus, signal converter, and signal processing system utilizing the circuit
10/29/1996US5570059 BiCMOS multiplexers and crossbar switches
10/29/1996US5570053 Method and apparatus for averaging clock skewing in clock distribution network
10/29/1996US5570051 Multiplexed by-passable memory devices with increased speed and improved flip-flop utilization
10/29/1996US5570046 Lead frame with noisy and quiet VSS and VDD leads
10/29/1996US5570044 BiCMOS output driver with reduced static power consumption
10/29/1996US5570043 Overvoltage tolerant intergrated circuit output buffer
10/29/1996US5570042 For amplifying the voltage level of a differential clock/data signal pair
10/29/1996US5570041 Programmable logic module and architecture for field programmable gate array device
10/29/1996US5570040 Programmable logic array integrated circuit incorporating a first-in first-out memory
10/29/1996US5570039 Programmable function unit as parallel multiplier cell
10/29/1996US5570038 Semiconductor integrated circuit device with data output circuit
10/29/1996US5570036 CMOS buffer circuit having power-down feature
10/29/1996US5570005 Wide range power supply for integrated circuits
10/24/1996WO1996033087A1 Continuous input cell for data acquisition circuits
10/24/1996WO1996033086A1 Ac input cell for data acquisition circuits
10/24/1996DE4041897C2 Integrierte Schaltkreiseinrichtung und Abtastpfadsystem Integrated circuit device and Abtastpfadsystem
10/24/1996CA2218525A1 Continuous input cell for data acquisition circuits
10/24/1996CA2218502A1 Ac input cell for data acquisition circuits
10/23/1996EP0739116A2 Transmission line driver with self adjusting output impedance
10/23/1996EP0739097A2 MOSFET circuit and CMOS logic circuit using the same
10/23/1996EP0738958A2 Multiplier
10/22/1996US5568084 Circuit for providing a compensated bias voltage
10/22/1996US5568083 Semiconductor integrated circuit device having an internally produced operation voltage matched to operation speed of circuit
10/22/1996US5568081 Variable slew control for output buffers
10/22/1996US5568076 Method of converting short duration input pulses to longer duration output pulses
10/22/1996US5568070 Multiplexer w/ selective switching for external signals
10/22/1996US5568069 High speed, low power pipelined logic circuit