Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
09/1994
09/13/1994US5347180 Three-input signal section, application to a selector with N inputs and to a poller with N inputs
09/13/1994US5347179 Inverting output driver circuit for reducing electron injection into the substrate
09/13/1994US5347178 CMOS semiconductor logic circuit with multiple input gates
09/13/1994US5347177 System for interconnecting VLSI circuits with transmission line characteristics
09/13/1994US5347172 Oscillatorless substrate bias generator
09/07/1994EP0614280A1 Semiconductor integrated circuit
09/07/1994EP0614279A2 Overvoltage tolerant output buffer circuit
09/06/1994US5345421 High speed, low noise semiconductor storage device
09/06/1994US5345356 ESD protection of output buffers
09/06/1994US5345116 IIL circuit and integrated circuit having the same
09/06/1994US5345115 Superconducting input interface circuit for superconducting circuit
09/06/1994US5345114 Superconductor logic and switching circuits
09/06/1994US5345113 Control module for reducing ringing in digital signals on a transmission line
09/06/1994US5345112 Integrated circuit with programmable speed/power adjustment
09/06/1994US5345111 High-speed current sense amplifier
09/01/1994WO1994019762A1 Computing device
09/01/1994WO1994019761A1 Semiconductor integrated circuit
09/01/1994WO1994019760A1 Semiconductor device
09/01/1994WO1994016500A3 A structured programmable datapath for a digital processor
08/1994
08/31/1994EP0613249A1 Custom look-up table with reduced number of architecture bits
08/31/1994EP0613248A1 Integrated circuit amplifiers
08/31/1994EP0613247A2 BICMOS reprogrammable logic
08/30/1994US5343479 Semiconductor integrated circuit having therein circuit for detecting abnormality of logical levels outputted from input buffers
08/30/1994US5343406 Distributed memory architecture for a configurable logic array and method for using distributed memory
08/30/1994US5343099 Output device capable of high speed operation and operating method thereof
08/30/1994US5343096 System and method for tolerating dynamic circuit decay
08/30/1994US5343094 Low noise logic amplifier with nondifferential to differential conversion
08/30/1994US5343093 Self referencing MOS to ECL level conversion circuit
08/30/1994US5343092 Self-biased feedback-controlled active pull-down signal switching
08/30/1994US5343091 Semiconductor logic integrated circuit having improved noise margin over DCFL circuits
08/30/1994US5343090 Speed enhancement technique for CMOS circuits
08/30/1994US5343083 Analog/digital hybrid masterslice IC
08/30/1994US5343081 Synapse circuit which utilizes ballistic electron beams in two-dimensional electron gas
08/24/1994EP0612154A1 Programmable logic circuit
08/24/1994EP0612153A1 FPGA with distributed switch matrix
08/24/1994EP0612152A2 A level shift circuit
08/24/1994EP0612151A2 Semiconductor device capable of reducing a clock skew in a plurality of wiring pattern blocks
08/24/1994EP0611497A1 Adaptive programming method for antifuse technology
08/23/1994US5341338 Data output circuit with minimum power source noise
08/23/1994US5341323 Fuzzy membership function circuit
08/23/1994US5341092 Testability architecture and techniques for programmable interconnect architecture
08/23/1994US5341049 Integrated circuit having alternate rows of logic cells and I/O cells
08/23/1994US5341047 Level shifter circuit
08/23/1994US5341046 Threshold controlled input circuit for an integrated circuit
08/23/1994US5341045 Programmable input buffer
08/23/1994US5341044 Flexible configuration logic array block for programmable logic devices
08/23/1994US5341043 Series linear antifuse array
08/23/1994US5341042 Low voltage, cascoded NTL based BiCMOS circuit
08/23/1994US5341041 Basic cell for BiCMOS gate array
08/23/1994US5341040 High performance output buffer with reduced ground bounce
08/23/1994US5341039 High frequency integrated circuit device including a circuit for decreasing reflected signals in wiring formed on a semiconductor substrate
08/23/1994US5341030 Methods for protecting outputs of low-voltage circuits from high programming voltages
08/23/1994CA1331638C Multiple page programmable logic architecture
08/18/1994WO1994018755A1 Output driver
08/17/1994EP0611161A2 Soft wakeup output buffer
08/17/1994EP0611113A1 Differential bus drivers
08/17/1994EP0611053A2 Buffer circuits
08/17/1994EP0610770A2 Multiplexing circuit arrangement using current switching
08/17/1994EP0610621A2 Digital logic circuit and method having pull-down and pull-up devices
08/17/1994EP0610430A1 Analog-to-digital converter and method of fabrication
08/17/1994EP0610426A1 Sampling buffer for field programmable interconnect device
08/17/1994EP0610259A1 1-bit adder and multiplier containing a 1-bit adder.
08/17/1994EP0610242A1 Logic level shifter
08/17/1994EP0610203A1 Differential driver/receiver circuit
08/16/1994US5338987 High speed, low power high common mode range voltage mode differential driver circuit
08/16/1994US5338984 Local and express diagonal busses in a configurable logic array
08/16/1994US5338983 Application specific exclusive of based logic module architecture for FPGAs
08/16/1994US5338982 Programmable logic device
08/16/1994US5338980 Circuit for providing a high-speed logic transition
08/16/1994US5338978 Full swing power down buffer circuit with multiple power supply isolation
08/10/1994EP0610064A2 Transistor switching
08/10/1994EP0609619A2 Article comprising a balanced driver circuit
08/10/1994EP0609529A1 Circuit and method of sensing process and temperature variation in an integrated circuit
08/09/1994US5337285 Method and apparatus for power control in devices
08/09/1994US5337254 Programmable integrated circuit output pad
08/09/1994US5336951 Structure and method for multiplexing pins for in-system programming
08/09/1994US5336950 Configuration features in a configurable logic array
08/09/1994US5336949 Logic circuit with enhancement type FET and Schottky gate
08/09/1994US5336948 Active negation emulator
08/09/1994US5336941 Superconducting circuit and method for driving the same
08/09/1994US5336940 Delay-compensated output pad for an integrated circuit and method therefor
08/09/1994US5336624 Method for disguising a microelectronic integrated digital logic
08/04/1994WO1994017595A1 Macrocell with product-term cascade and improved flip flop utilization
08/04/1994DE4335245A1 Vektorlogikverfahren und dynamisches Logikgatter für eine selbstzeitgebende, monotone Logikprogression Vector logic method and dynamic logic gates for a self-giving time, monotonic logic progression
08/03/1994EP0608977A1 Low power digital signal buffer circuit
08/03/1994EP0608786A1 Very low voltage inter-chip CMOS logic signaling for large numbers of high-speed output lines each associated with large capacitive loads
08/03/1994EP0608615A2 Clock driver circuits
08/03/1994EP0608602A2 Reprogrammable electronic assemblies
08/03/1994EP0608515A1 Programmable drive output buffer
08/03/1994EP0608489A2 Low-to-high voltage translator with latch-up immunity
08/03/1994CN2173480Y Electronic coding integral chip
08/02/1994US5335134 Circuit configuration for protecting terminals of integrated circuits
08/02/1994US5334889 CMOS output buffer circuit with less noise
08/02/1994US5334888 Fast exclusive-or and exclusive-nor gates
08/02/1994US5334886 Direct-coupled PNP transistor pull-up ECL circuits and direct-coupled complementary push-pull ECL circuits
08/02/1994US5334885 Automatic control of buffer speed
08/02/1994US5334882 Driver for backplane transceiver logic bus
07/1994
07/27/1994EP0607657A1 Programmable logic device and method of operation
07/27/1994CN1090102A Rectifying transfer gate circuit
07/26/1994US5333282 Semiconductor integrated circuit device with at least one bipolar transistor arranged to provide a direct connection between a plurality of MOSFETs