Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
07/1996
07/02/1996US5532578 Reference voltage generator utilizing CMOS transistor
06/1996
06/30/1996CA2163579A1 Ultra-fast mos device circuits
06/27/1996WO1996019871A1 Negative feedback to reduce voltage oscillation in cmos output buffers
06/27/1996DE4447546C2 Integrated circuit e.g. with CMOS buffer
06/27/1996DE19548489A1 Protection circuit for input=output circuit
06/26/1996EP0718977A2 Output driver circuitry with selectable limited output high voltage
06/26/1996EP0718976A2 Output buffer circuit for high-speed logic operation
06/26/1996EP0718975A1 Output driver circuitry with limited output high voltage
06/26/1996EP0718743A1 Voltage reference circuit having a threshold voltage shift
06/26/1996EP0717890A1 High swing interface stage
06/26/1996EP0717889A1 Vcc TRANSLATOR CIRCUIT
06/25/1996US5530814 Bi-directional crossbar switch with control memory for selectively routing signals between pairs of signal ports
06/25/1996US5530381 Integrated high-speed bipolar logic circuit method
06/25/1996US5530380 Decoder circuit which resists a fluctuation of a power supply
06/25/1996US5530379 Output buffer circuit that can be shared by a plurality of interfaces and a semiconductor device using the same
06/25/1996US5530378 Programmable logic device
06/25/1996US5530275 Semiconductor device for summing weighted input signals
06/20/1996WO1996011541A3 Fault tolerant digital transmission system
06/19/1996EP0717501A1 Programmable drive buffer
06/19/1996EP0717500A2 Compact semiconductor integrated circuit capable of reducing electromagnetic emission
06/19/1996EP0717497A2 Compounded power MOSFET
06/19/1996EP0717334A2 Circuit for providing a compensated bias voltage
06/19/1996EP0717333A1 Supply voltage selection circuit for a voltage controller
06/19/1996CN1125006A Field programmable logic device with dynamic interconnections to a dynamic logic core
06/18/1996US5528541 Charge shared precharge scheme to reduce compare output delays
06/18/1996US5528447 5-volt tolerant bi-directional i/o pad for 3-volt-optimized integrated circuits
06/18/1996US5528192 Bi-mode circuit for driving an output load
06/18/1996US5528178 Sense and hold amplifier
06/18/1996US5528177 Complementary field-effect transistor logic circuits for wave pipelining
06/18/1996US5528176 Register with duplicate decoders for configurable cellular array
06/18/1996US5528175 Devices for implementing microwave phase logic
06/18/1996US5528174 Devices for implementing microwave phase logic
06/18/1996US5528172 Adjustable voltage level shifter
06/18/1996US5528171 ECL-to-CMOS signal level converter
06/18/1996US5528170 Low-skew signal routing in a programmable array
06/18/1996US5528166 Pulse controlled impedance compensated output buffer
06/18/1996US5528130 Intermediate potential generating circuit having output stabilizing circuit
06/13/1996WO1996018239A2 Terminating transmission line impedance-matching circuit
06/12/1996EP0716510A1 Configurable input buffers
06/12/1996EP0716379A2 Interface voltage control apparatus and method
06/12/1996EP0665998A4 Microprocessor-based fpga.
06/12/1996CN1124422A Multiplexer
06/11/1996US5526276 Select set-based technology mapping method and apparatus
06/11/1996US5525933 Semiconductor integrated circuit
06/11/1996US5525926 To reduce a regulated power source voltage spike
06/11/1996US5525916 All-N-logic high-speed single-phase dynamic CMOS logic
06/06/1996WO1996017389A1 Temperature compensation circuit for ic chip
06/05/1996EP0715411A2 Low-power-dissipation CMOS circuits
06/05/1996EP0715240A1 Voltage regulator for logical circuit in coupled mode
06/05/1996EP0714570A1 Interface circuits between powered down devices and a bus
06/05/1996EP0714545A1 Improved data output buffer
06/04/1996US5524097 Power saving sense amplifier that mimics non-toggling bitline states
06/04/1996US5524088 Multi-functional operating circuit providing capability of freely combining operating functions
06/04/1996US5523707 Fast, low power exclusive or circuit
06/04/1996US5523706 High speed, low power macrocell
06/04/1996US5523705 Apparatus and method for selecting and buffering inputs of programmable logic devices
06/04/1996US5523703 Method and apparatus for controlling termination of current driven circuits
06/04/1996US5523702 Sequentially switching output buffers
06/03/1996CA2160185A1 Low-power-dissipation cmos circuits
05/1996
05/30/1996WO1996016494A1 Coupling arrangement in a terminating circuit
05/30/1996WO1996016479A1 Sense amplifier and or gate for a high density programmable logic device
05/30/1996WO1996016478A1 Output buffer for a high density programmable logic device
05/30/1996WO1996016477A1 Input buffer for a high density programmable logic device
05/30/1996DE4441766A1 Cryo-electric circuit with high temp. superconductor
05/30/1996DE19542987A1 Current type inverter circuit
05/29/1996EP0714168A2 Through currents minimisation in electronic circuits
05/29/1996EP0714167A1 Digital driver circuit for an integrated circuit
05/28/1996US5521558 Inverter stage having diode load and ring oscillator using same
05/28/1996US5521541 Semiconductor device capable of reducing a clock skew in a plurality of wiring pattern blocks
05/28/1996US5521540 Method and apparatus for multi-range delay control
05/28/1996US5521538 Adiabatic logic
05/28/1996US5521536 Integrated circuit device having different signal transfer circuits for wirings with different lengths
05/28/1996US5521531 CMOS bidirectional transceiver/translator operating between two power supplies of different voltages
05/28/1996US5521530 Efficient method and resulting structure for integrated circuits with flexible I/O interface and power supply voltages
05/28/1996US5521529 Very high-density complex programmable logic devices with a multi-tiered hierarchical switch matrix and optimized flexible logic allocation
05/28/1996US5521527 Semiconductor integrated circuits with power reduction mechanism
05/23/1996WO1996015588A1 Cmos schmitt trigger
05/22/1996EP0713294A1 Decoder with reduced architecture
05/22/1996EP0712548A1 Architecture and interconnect scheme for programmable logic circuits
05/21/1996US5519728 High-speed low-voltage differential swing transmission line transceiver
05/21/1996US5519629 Tileable gate array cell for programmable logic devices and gate array having tiled gate array cells
05/21/1996US5519353 Balanced driver circuit for eliminating inductive noise
05/21/1996US5519350 Circuitry for delivering a signal to different load elements located in an electronic system
05/21/1996US5519344 Fast propagation technique in CMOS integrated circuits
05/21/1996US5519339 Complementary signal BiCMOS line driver with low skew
05/21/1996US5519338 Controlled slew rate output buffer
05/17/1996WO1996014688A1 Apparatus for programmable circuit and signal switching
05/17/1996WO1996014662A1 Microelectronic integrated circuit structure and method using three directional interconnect routing based on hexagonal geometry
05/17/1996WO1996014619A1 Hierarchical crossbar switch
05/15/1996EP0712209A2 System for, and method of, minizing noise in an integrated circuit chip
05/15/1996EP0712208A2 Simulation by emulating level sensitive latches with edge trigger latches
05/15/1996EP0711447A1 Programmable logic device with verify circuitry for classifying fuse link states as validly closed, validly open or invalid
05/14/1996US5517515 Multichip module with integrated test circuitry disposed within interposer substrate
05/14/1996US5517142 For generating an output signal at an output node
05/14/1996US5517138 Dual row selection using multiplexed tri-level decoder
05/14/1996US5517136 Opportunistic time-borrowing domino logic
05/14/1996US5517135 Bidirectional tristate buffer with default input
05/14/1996US5517133 Multiple-input OR-gate employing a sense amplifier
05/14/1996US5517131 TTL input buffer with on-chip reference bias regulator and decoupling capacitor
05/14/1996US5517130 Method and structure for reducing noise in output buffer circuits
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